From: Patrick Delaunay Date: Mon, 16 Apr 2018 08:13:22 +0000 (+0200) Subject: arm: psci: save context id for cpu_on PSCI command X-Git-Tag: v2018.07-rc1~252 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1a047c23f9e5e7f498cc3ca759725ae7b6c6a6b9;p=u-boot arm: psci: save context id for cpu_on PSCI command Save and use the 3rd parameter of PSCI CPU_ON request: context_id. The context_id parameter is only meaningful to the caller. U-Boot PSCI preserves a copy of the value passed in this parameter. Following wakeup from a powerdown state, U-BOOT PSCI places this value in R0 when it first enters the OS. NB: this context id is not (yet?) used by Linux but it is mandatory to be PSCI compliant. update armv7 psci functions: - psci_save_target_pc(): keep for backward compatibility with current platform (only save PC and force context id to 0) => should be removed when all platform migrate to the new API - psci_save(): new API to use by ARMv7 platform with PSCI, save pc (= entry_point_address) and context_id Signed-off-by: Patrick Delaunay Reviewed-by: Stephen Warren Reviewed-by: Masahiro Yamada --- diff --git a/arch/arm/cpu/armv7/psci-common.c b/arch/arm/cpu/armv7/psci-common.c index 8cb4107be6..73f986bf72 100644 --- a/arch/arm/cpu/armv7/psci-common.c +++ b/arch/arm/cpu/armv7/psci-common.c @@ -25,10 +25,19 @@ #include static u32 psci_target_pc[CONFIG_ARMV7_PSCI_NR_CPUS] __secure_data = { 0 }; +static u32 psci_context_id[CONFIG_ARMV7_PSCI_NR_CPUS] __secure_data = { 0 }; void __secure psci_save_target_pc(int cpu, u32 pc) { psci_target_pc[cpu] = pc; + psci_context_id[cpu] = 0; + dsb(); +} + +void __secure psci_save(int cpu, u32 pc, u32 context_id) +{ + psci_target_pc[cpu] = pc; + psci_context_id[cpu] = context_id; dsb(); } @@ -37,3 +46,8 @@ u32 __secure psci_get_target_pc(int cpu) return psci_target_pc[cpu]; } +u32 __secure psci_get_context_id(int cpu) +{ + return psci_context_id[cpu]; +} + diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index 95b962dadf..35fd95576a 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -327,6 +327,10 @@ ENTRY(psci_cpu_entry) bl _nonsec_init bl psci_get_cpu_id @ CPU ID => r0 + mov r2, r0 @ CPU ID => r2 + bl psci_get_context_id @ context id => r0 + mov r1, r0 @ context id => r1 + mov r0, r2 @ CPU ID => r0 bl psci_get_target_pc @ target PC => r0 b _do_nonsec_entry ENDPROC(psci_cpu_entry) diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index ac8b00d6fc..b41524106b 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -93,9 +93,11 @@ #ifndef __ASSEMBLY__ #include -/* These 2 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */ +/* These 4 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */ u32 psci_get_target_pc(int cpu); +u32 psci_get_context_id(int cpu); void psci_save_target_pc(int cpu, u32 pc); +void psci_save(int cpu, u32 pc, u32 context_id); void psci_cpu_entry(void); u32 psci_get_cpu_id(void);