From: Shaohui Xie Date: Wed, 7 Sep 2016 09:56:12 +0000 (+0800) Subject: armv8: ls1046a: disable SATA ECC in DCSR X-Git-Tag: v2016.11-rc1~40^2~9 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1b2b406636b5643466552fdb4821eff1a76d8acb;p=u-boot armv8: ls1046a: disable SATA ECC in DCSR This is a workaround to fix SATA CRC error. Once the root cause is found the ECC disabling will be removed. Signed-off-by: Shaohui Xie Signed-off-by: Gong Qianyu Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 43c4aa59a1..5ca721d079 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -228,6 +228,10 @@ int sata_init(void) { struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA; +#ifdef CONFIG_LS1046A + /* Disable SATA ECC */ + out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); +#endif out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG); out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);