From: Nishanth Menon Date: Mon, 27 Jul 2015 21:26:06 +0000 (-0500) Subject: ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration X-Git-Tag: v2015.10-rc2~102 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1bbb556a6a5c0f44d2da32700fce4d279c851e9f;p=u-boot ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration Implement logic for ACR(Auxiliary Control Register) configuration using ROM Code smc service. Suggested-by: Richard Woodruff Suggested-by: Brad Griffis Reviewed-by: Brad Griffis Signed-off-by: Nishanth Menon --- diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 39f8d0d5e2..bc19aebc6d 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -418,3 +418,9 @@ void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr, { omap_smc1(OMAP5_SERVICE_L2ACTLR_SET, l2auxctrl); } + +void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, + u32 cpu_variant, u32 cpu_rev) +{ + omap_smc1(OMAP5_SERVICE_ACR_SET, acr); +} diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h index 6da8297c72..7fcb783894 100644 --- a/arch/arm/include/asm/arch-omap5/sys_proto.h +++ b/arch/arm/include/asm/arch-omap5/sys_proto.h @@ -81,5 +81,6 @@ static inline u32 usec_to_32k(u32 usec) } #define OMAP5_SERVICE_L2ACTLR_SET 0x104 +#define OMAP5_SERVICE_ACR_SET 0x107 #endif