From: Marek Vasut Date: Fri, 21 Jul 2017 21:24:33 +0000 (+0200) Subject: mmc: uniphier-sd: Add support for 64bit controller X-Git-Tag: v2017.11-rc1~38^2~5 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1c99f68e932b0ebf97aad038400eaf70ce5c6c8e;p=u-boot mmc: uniphier-sd: Add support for 64bit controller The Renesas RCar Gen3 contains the same controller, originally Matsushita, yet the register addresses are shifted by 1 to the left. The whole controller is also 64bit, including the data FIFOs and RSP registers. This patch adds support for handling the register IO by shifting the register offset by 1 in the IO accessor functions. Signed-off-by: Marek Vasut Cc: Masahiro Yamada Cc: Jaehoon Chung --- diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index f6682231a2..013089299d 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -132,17 +132,24 @@ struct uniphier_sd_priv { #define UNIPHIER_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */ #define UNIPHIER_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */ #define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */ +#define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */ }; static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg) { - return readl(priv->regbase + reg); + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + return readl(priv->regbase + (reg << 1)); + else + return readl(priv->regbase + reg); } static void uniphier_sd_writel(struct uniphier_sd_priv *priv, const u32 val, const u32 reg) { - writel(val, priv->regbase + reg); + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + writel(val, priv->regbase + (reg << 1)); + else + writel(val, priv->regbase + reg); } static dma_addr_t __dma_map_single(void *ptr, size_t size,