From: Philipp Tomsich Date: Wed, 16 Nov 2016 01:40:27 +0000 (+0000) Subject: sun8i_emac: Fix mdio read sequence X-Git-Tag: v2017.01-rc1~196 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1deeecb6e41a42d0e24fec30d2bb74c56d7a0d9b;p=u-boot sun8i_emac: Fix mdio read sequence To send a parametrized command to the PHY over MDIO, we should write the data first, the trigger the execution by the command register write. Fix the access pattern in our MDIO write routine. Apparently this doesn't really matter with the Realtek PHY on the Pine64, but other PHYs (which require more setup) will choke on the wrong order. [Andre: add commit message] Signed-off-by: Philipp Tomsich Signed-off-by: Andre Przywara Acked-by: Jagan Teki --- diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 6ac8ba3721..abd9cc8bc0 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -180,8 +180,8 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg, miiaddr |= MDIO_CMD_MII_WRITE; miiaddr |= MDIO_CMD_MII_BUSY; - writel(miiaddr, priv->mac_reg + EMAC_MII_CMD); writel(val, priv->mac_reg + EMAC_MII_DATA); + writel(miiaddr, priv->mac_reg + EMAC_MII_CMD); start = get_timer(0); while (get_timer(start) < timeout) {