From: Prabhakar Kushwaha Date: Fri, 3 Jun 2016 13:11:26 +0000 (+0530) Subject: armv8: fsl-layerscape: Put SMMU config code in SMMU_BASE X-Git-Tag: v2016.07-rc1~26^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1e49a2318ad22ad842bf4c768398f0f5f9872dc0;p=u-boot armv8: fsl-layerscape: Put SMMU config code in SMMU_BASE It is not mandatory for Layerscape SoCs to have SMMU. SoCs like LS1012A are layerscape SoC without SMMU IP. So put SMMU configuration code under SMMU_BASE. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 04831ca5bb..d743ffe6b5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -94,11 +94,13 @@ ENTRY(lowlevel_init) bl ccn504_set_qos #endif +#ifdef SMMU_BASE /* Set the SMMU page size in the sACR register */ ldr x1, =SMMU_BASE ldr w0, [x1, #0x10] orr w0, w0, #1 << 16 /* set sACR.pagesize to indicate 64K page */ str w0, [x1, #0x10] +#endif /* Initialize GIC Secure Bank Status */ #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)