From: Santan Kumar Date: Fri, 5 May 2017 10:12:29 +0000 (+0530) Subject: armv8: ls2080aqds: Add support for SD boot X-Git-Tag: v2017.07-rc1~88^2~5 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=1f55a93802ab1522e4f479d1d2730158e26b3567;p=u-boot armv8: ls2080aqds: Add support for SD boot Signed-off-by: Santan Kumar Signed-off-by: Priyanka Jain Signed-off-by: Abhimanyu Saini Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index cba0095e6a..c4bb31156b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -464,7 +464,7 @@ int cpu_eth_init(bd_t *bis) { int error = 0; -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) error = fsl_mc_ldpaa_init(bis); #endif #ifdef CONFIG_FMAN_ENET @@ -608,7 +608,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size) { phys_size_t ram_top = ram_size; -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) /* The start address of MC reserved memory needs to be aligned. */ ram_top -= mc_get_dram_block_size(); ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1); @@ -723,7 +723,7 @@ int dram_init_banksize(void) } #endif /* CONFIG_SYS_MEM_RESERVE_SECURE */ -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) /* Assign memory for MC */ #ifdef CONFIG_SYS_DDR_BLOCK3_BASE if (gd->bd->bi_dram[2].size >= diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index 955e0b7478..ef97556367 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT]; static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT]; #endif -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) int xfi_dpmac[XFI8 + 1]; int sgmii_dpmac[SGMII16 + 1]; #endif @@ -110,7 +110,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask, debug("Unknown SerDes lane protocol %d\n", lane_prtcl); else { serdes_prtcl_map[lane_prtcl] = 1; -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) switch (lane_prtcl) { case QSGMII_A: case QSGMII_B: @@ -141,7 +141,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask, void fsl_serdes_init(void) { -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) int i , j; for (i = XFI1, j = 1; i <= XFI8; i++, j++) diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index ecf4bd67ed..41417e9dc6 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis) error = smc91111_initialize(0, CONFIG_SMC91111_BASE); #endif -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) error = cpu_eth_init(bis); #endif return error; } -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) void fdt_fixup_board_enet(void *fdt) { int offset; @@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory_banks(blob, base, size, 2); -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) fdt_fixup_board_enet(blob); #endif diff --git a/board/freescale/ls2080aqds/MAINTAINERS b/board/freescale/ls2080aqds/MAINTAINERS index 79877d7774..62c8fac09c 100644 --- a/board/freescale/ls2080aqds/MAINTAINERS +++ b/board/freescale/ls2080aqds/MAINTAINERS @@ -7,6 +7,7 @@ F: include/configs/ls2080aqds.h F: configs/ls2080aqds_defconfig F: configs/ls2080aqds_nand_defconfig F: configs/ls2080aqds_qspi_defconfig +F: configs/ls2080aqds_sdcard_defconfig LS2080A_SECURE_BOOT BOARD M: Saksham Jain diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index cad860eac2..8e31e9e41e 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -102,6 +102,19 @@ DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 +Memory map for SD boot +------------------------- +Image Flash Offset SD Card + Start Block No. +RCW+PBI 0x00000000 0x00008 +Boot firmware (U-Boot) 0x00100000 0x00800 +Boot firmware Environment 0x00300000 0x01800 +PPA firmware 0x00400000 0x02000 +DPAA2 MC 0x00A00000 0x05000 +DPAA2 DPL 0x00D00000 0x06800 +DPAA2 DPC 0x00E00000 0x07000 +Kernel.itb 0x01000000 0x08000 + Environment Variables --------------------- - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index 8c44aacdba..defcac5263 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -23,7 +23,7 @@ #define MC_BOOT_ENV_VAR "mcinitcmd" -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks. * Bank 1 -> Lanes A, B, C, D, E, F, G, H * Bank 2 -> Lanes A,B, C, D, E, F, G, H @@ -835,7 +835,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i) int board_eth_init(bd_t *bis) { int error; -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 6da9c6cfe8..f36fb9810b 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -280,7 +280,7 @@ int arch_misc_init(void) } #endif -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) void fdt_fixup_board_enet(void *fdt) { int offset; @@ -336,7 +336,7 @@ int ft_board_setup(void *blob, bd_t *bd) fsl_fdt_fixup_dr_usb(blob, bd); -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) fdt_fixup_board_enet(blob); #endif diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig new file mode 100644 index 0000000000..a6d2f813b1 --- /dev/null +++ b/configs/ls2080aqds_sdcard_defconfig @@ -0,0 +1,56 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080AQDS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SD_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_SPL=y +CONFIG_FSL_LS_PPA=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_DATE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_DM_SPI_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 43c5fef9b9..e311d0b149 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -208,9 +208,16 @@ unsigned long long get_qixis_addr(void); "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x2000000 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" +#ifdef CONFIG_SD_BOOT +#define CONFIG_BOOTCOMMAND "mmc read 0x80200000 0x6800 0x800;"\ + " fsl_mc apply dpl 0x80200000 &&" \ + " mmc read $kernel_load $kernel_start" \ + " $kernel_size && bootm $kernel_load" +#else #define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" +#endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e6ebec50ba..8a8ee9d351 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -166,12 +166,14 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x04 #define QIXIS_LBMAP_NAND 0x09 +#define QIXIS_LBMAP_SD 0x00 #define QIXIS_LBMAP_QSPI 0x0f #define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RCW_SRC_NAND 0x107 +#define QIXIS_RCW_SRC_SD 0x40 #define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_FORCE_MEM 0x01 @@ -235,6 +237,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_ENV_OFFSET 0x200000 +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x20000 #endif #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT @@ -368,6 +375,22 @@ unsigned long get_board_ddr_clk(void); "esbc_validate 0x580740000;" \ "fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "loadaddr=0x90100000\0" \ + "kernel_addr=0x800\0" \ + "ramdisk_addr=0x800000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_start=0x8000\0" \ + "kernel_load=0xa0000000\0" \ + "kernel_size=0x14000\0" \ + "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ + "mmc read 0x80100000 0x7000 0x800;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" \ + "mcmemsize=0x70000000 \0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ @@ -386,7 +409,7 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_SECURE_BOOT */ -#ifdef CONFIG_FSL_MC_ENET +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) #define CONFIG_FSL_MEMAC #define CONFIG_PHYLIB #define CONFIG_PHYLIB_10G