From: Jagan Teki <jagan@openedev.com>
Date: Fri, 24 Feb 2017 10:15:13 +0000 (+0530)
Subject: imx: spl: Update NAND bootmode detection bit
X-Git-Tag: v2017.05-rc1~49^2~45
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=20f14714169;p=u-boot

imx: spl: Update NAND bootmode detection bit

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
---

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
index 6c20f28e10..81fc0ca252 100644
--- a/arch/arm/imx-common/spl.c
+++ b/arch/arm/imx-common/spl.c
@@ -63,8 +63,8 @@ u32 spl_boot_device(void)
 	case 0x6:
 	case 0x7:
 		return BOOT_DEVICE_MMC1;
-	/* NAND Flash: 8.5.2 */
-	case 0x8 ... 0xf:
+	/* NAND Flash: 8.5.2, Table 8-10 */
+	case 0x8:
 		return BOOT_DEVICE_NAND;
 	}
 	return BOOT_DEVICE_NONE;