From: Mike Frysinger Date: Thu, 7 Aug 2008 19:31:13 +0000 (-0400) Subject: Blackfin: split cache handling out of dma_memcpy() X-Git-Tag: v2009.03-rc1~147^2~32 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=21d631360430cf0ae9099612273cd4de28911ba9;p=u-boot Blackfin: split cache handling out of dma_memcpy() Creating a new dma_memcpy() function that skips all cache checks allows us to use the function in very early init where the cache is not yet setup. Signed-off-by: Mike Frysinger --- diff --git a/lib_blackfin/string.c b/lib_blackfin/string.c index ab71285bb6..2a56910aff 100644 --- a/lib_blackfin/string.c +++ b/lib_blackfin/string.c @@ -134,7 +134,7 @@ int strncmp(const char *cs, const char *ct, size_t count) * Perhaps we should detect that ? Nowhere do we actually * use dma memcpy for those types of lengths though ... */ -static void *dma_memcpy(void *dst, const void *src, size_t count) +void dma_memcpy_nocache(void *dst, const void *src, size_t count) { /* Scratchpad cannot be a DMA source or destination */ if (((unsigned long)src >= L1_SRAM_SCRATCH && @@ -143,10 +143,9 @@ static void *dma_memcpy(void *dst, const void *src, size_t count) (unsigned long)dst < L1_SRAM_SCRATCH_END)) hang(); - if (dcache_status()) - blackfin_dcache_flush_range(src, src + count); - - bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); + bfin_write_MDMA_S0_CONFIG(0); + bfin_write_MDMA_D0_CONFIG(0); + bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR); /* Copy sram functions from sdram to sram */ /* Setup destination start address */ @@ -165,13 +164,23 @@ static void *dma_memcpy(void *dst, const void *src, size_t count) /* Enable source DMA */ bfin_write_MDMA_S0_CONFIG(DMAEN); - SSYNC(); bfin_write_MDMA_D0_CONFIG(WNR | DMAEN); + SSYNC(); while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN) - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); - bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); + continue; + + bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_RUN | DMA_DONE | DMA_ERR); + bfin_write_MDMA_D0_CONFIG(0); + bfin_write_MDMA_S0_CONFIG(0); +} +void *dma_memcpy(void *dst, const void *src, size_t count) +{ + if (dcache_status()) + blackfin_dcache_flush_range(src, src + count); + + dma_memcpy_nocache(dst, src, count); if (icache_status()) blackfin_icache_flush_range(dst, dst + count);