From: Priyanka Jain Date: Tue, 29 Nov 2016 11:15:05 +0000 (+0530) Subject: armv8: ls2080a: Add serdes1 protocol 0x3b support X-Git-Tag: v2017.01-rc1~1^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=237addb3ca008af21a1491348cf920601f84ff06;p=u-boot armv8: ls2080a: Add serdes1 protocol 0x3b support Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index 67d605e38b..ab83e85adc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -36,6 +36,7 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } }, {0x39, {SGMII8, SGMII7, SGMII6, PCIE2, SGMII4, SGMII3, SGMII2, PCIE1 } }, + {0x3B, {XFI8, XFI7, XFI6, PCIE2, XFI4, XFI3, XFI2, PCIE1 } }, {0x4B, {PCIE2, PCIE2, PCIE2, PCIE2, XFI4, XFI3, XFI2, XFI1 } }, {0x4C, {XFI8, XFI7, XFI6, XFI5, PCIE1, PCIE1, PCIE1, PCIE1 } }, {0x4D, {SGMII8, SGMII7, PCIE2, PCIE2, SGMII4, SGMII3, PCIE1, PCIE1 } },