From: RichardBarry Date: Thu, 29 Jan 2009 19:55:14 +0000 (+0000) Subject: Combine different part variants into a single port.c file. X-Git-Tag: V5.1.2~50 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=23a320a1d7a84eb0198a99f67bd8d4f0963cb7ad;p=freertos Combine different part variants into a single port.c file. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@646 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Source/portable/IAR/V850ES/port.c b/Source/portable/IAR/V850ES/port.c index df9fbbb27..feba836ed 100644 --- a/Source/portable/IAR/V850ES/port.c +++ b/Source/portable/IAR/V850ES/port.c @@ -37,13 +37,13 @@ Please ensure to read the configuration and relevant port sections of the online documentation. - http://www.FreeRTOS.org - Documentation, latest information, license and + http://www.FreeRTOS.org - Documentation, latest information, license and contact details. - http://www.SafeRTOS.com - A version that is certified for use in safety + http://www.SafeRTOS.com - A version that is certified for use in safety critical systems. - http://www.OpenRTOS.com - Commercial support, development, porting, + http://www.OpenRTOS.com - Commercial support, development, porting, licensing and training services. */ @@ -184,11 +184,18 @@ static void prvSetupTimerInterrupt( void ) TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */ TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ - /* Set INTTM0EQ0 level 5 priority */ + #ifdef __IAR_V850ES_Fx3__ + { + TM0CMP0 = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1); /* divided by 2 because peripherals only run at CPU_CLOCK/2 */ + } + #else + { + TM0CMP0 = (configCPU_CLOCK_HZ / configTICK_RATE_HZ); + } + #endif + TM0EQIC0 &= 0xF8; TM0CTL0 = 0x00; - TM0CMP0 = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1); /* divided by 2 because peripherals only run at CPU_CLOCK/2 */ - TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */ TM0CE = 1; /* TMM0 operation enable */