From: Peng Fan <peng.fan@nxp.com>
Date: Mon, 10 Apr 2017 11:44:33 +0000 (+0800)
Subject: net: fec: do not access reserved register for i.MX6ULL
X-Git-Tag: v2017.07-rc1~248^2~42
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=27255fe82163c2459431e1a270338df3bf76e1ec;p=u-boot

net: fec: do not access reserved register for i.MX6ULL

The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
---

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 910879ba3e..ac7afb5b35 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
 	writel(0x00000000, &fec->eth->gaddr2);
 
 	/* Do not access reserved register for i.MX6UL */
-	if (!is_mx6ul()) {
+	if (!is_mx6ul() && !is_mx6ull()) {
 		/* clear MIB RAM */
 		for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
 			writel(0, i);