From: huang lin Date: Tue, 17 Nov 2015 06:20:24 +0000 (+0800) Subject: rockchip: mmc: get the fifo mode and fifo depth property from dts X-Git-Tag: v2016.01-rc2~55 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=2863724831a37b7ef84ba7490c4d41e678191b03;p=u-boot rockchip: mmc: get the fifo mode and fifo depth property from dts rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver. Signed-off-by: Lin Huang --- diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi index 0daae1ec30..ecf5416318 100644 --- a/arch/arm/dts/rk3036.dtsi +++ b/arch/arm/dts/rk3036.dtsi @@ -257,6 +257,7 @@ cap-mmc-highspeed; mmc-ddr-1_8v; disable-wp; + fifo-mode; non-removable; num-slots = <1>; default-sample-phase = <158>; diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index dfe20f90f5..aeaec6c865 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -64,6 +64,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; u32 minmax[2]; int ret; + int fifo_depth; priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); if (IS_ERR(priv->grf)) @@ -72,10 +73,22 @@ static int rockchip_dwmmc_probe(struct udevice *dev) if (ret) return ret; - ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, - "clock-freq-min-max", minmax, 2); - if (!ret) - ret = add_dwmci(host, minmax[1], minmax[0]); + if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, + "clock-freq-min-max", minmax, 2)) + return -EINVAL; + + fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "fifo-depth", 0); + if (fifo_depth < 0) + return -EINVAL; + + host->fifoth_val = MSIZE(0x2) | + RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); + + if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode")) + host->fifo_mode = true; + + ret = add_dwmci(host, minmax[1], minmax[0]); if (ret) return ret;