From: Roy Zang <tie-fei.zang@freescale.com>
Date: Tue, 30 Jun 2009 05:56:23 +0000 (+0800)
Subject: 85xx: Add pci e1000 Ethernet support for P2020 board
X-Git-Tag: v2009.08-rc1~122^2~17
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=29c35182462feea09f322e51913759a53359a3e0;p=u-boot

85xx: Add pci e1000 Ethernet support for P2020 board

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 6b72d61426..293e5a42dc 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -36,6 +36,7 @@
 #include <tsec.h>
 #include <asm/fsl_law.h>
 #include <asm/mp.h>
+#include <netdev.h>
 
 #include "../common/pixis.h"
 #include "../common/sgmii_riser.h"
@@ -594,7 +595,7 @@ int board_eth_init(bd_t *bis)
 
 	tsec_eth_init(bis, tsec_info, num);
 
-	return 0;
+	return pci_eth_init(bis);
 }
 #endif
 
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 84b5686244..fddcce5e4f 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -46,6 +46,7 @@
 #define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
+#define CONFIG_E1000		1	/* Defind e1000 pci Ethernet card*/
 
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE