From: Stephen Warren <swarren@nvidia.com>
Date: Wed, 30 Apr 2014 21:09:56 +0000 (-0600)
Subject: usb: tegra: refactor PHY type selection
X-Git-Tag: v2014.07-rc2~10^2~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=2d34151f7501ddaa599897f0d89ad576126b03eb;p=u-boot

usb: tegra: refactor PHY type selection

Both init_{utmi,ulpi}_usb_controller() have nearly identical code for
PHY type selection. Pull this out into a common function to remove the
duplication.

Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---

diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 9a9a1277d1..55a546e4d3 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -293,6 +293,32 @@ static const unsigned *get_pll_timing(void)
 	return timing;
 }
 
+/* select the PHY to use with a USB controller */
+static void init_phy_mux(struct fdt_usb *config, uint pts)
+{
+	struct usb_ctlr *usbctlr = config->reg;
+
+#if defined(CONFIG_TEGRA20)
+	if (config->periph_id == PERIPH_ID_USBD) {
+		clrsetbits_le32(&usbctlr->port_sc1, PTS1_MASK,
+				PTS_UTMI << PTS1_SHIFT);
+		clrbits_le32(&usbctlr->port_sc1, STS1);
+	} else {
+		clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
+				PTS_UTMI << PTS_SHIFT);
+		clrbits_le32(&usbctlr->port_sc1, STS);
+	}
+#else
+	/* Set to Host mode after Controller Reset was done */
+	clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC,
+			USBMODE_CM_HC);
+	/* Select PHY interface after setting host mode */
+	clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,
+			pts << PTS_SHIFT);
+	clrbits_le32(&usbctlr->hostpc1_devlc, STS);
+#endif
+}
+
 /* set up the UTMI USB controller with the parameters provided */
 static int init_utmi_usb_controller(struct fdt_usb *config)
 {
@@ -485,25 +511,7 @@ static int init_utmi_usb_controller(struct fdt_usb *config)
 	clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);
 
 	/* Select UTMI parallel interface */
-#if defined(CONFIG_TEGRA20)
-	if (config->periph_id == PERIPH_ID_USBD) {
-		clrsetbits_le32(&usbctlr->port_sc1, PTS1_MASK,
-				PTS_UTMI << PTS1_SHIFT);
-		clrbits_le32(&usbctlr->port_sc1, STS1);
-	} else {
-		clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
-				PTS_UTMI << PTS_SHIFT);
-		clrbits_le32(&usbctlr->port_sc1, STS);
-	}
-#else
-	/* Set to Host mode after Controller Reset was done */
-	clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC,
-			USBMODE_CM_HC);
-	/* Select PHY interface after setting host mode */
-	clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,
-			PTS_UTMI << PTS_SHIFT);
-	clrbits_le32(&usbctlr->hostpc1_devlc, STS);
-#endif
+	init_phy_mux(config, PTS_UTMI);
 
 	/* Deassert power down state */
 	clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_FORCE_PD_POWERDOWN |
@@ -561,17 +569,7 @@ static int init_ulpi_usb_controller(struct fdt_usb *config)
 			ULPI_CLKOUT_PINMUX_BYP | ULPI_OUTPUT_PINMUX_BYP);
 
 	/* Select ULPI parallel interface */
-#if defined(CONFIG_TEGRA20)
-	clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
-			PTS_ULPI << PTS_SHIFT);
-#else
-	/* Set to Host mode after Controller Reset was done */
-	clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC,
-			USBMODE_CM_HC);
-	/* Select PHY interface after setting host mode */
-	clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,
-			PTS_ULPI << PTS_SHIFT);
-#endif
+	init_phy_mux(config, PTS_ULPI);
 
 	/* enable ULPI transceiver */
 	setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);