From: richardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Wed, 5 Mar 2008 10:13:59 +0000 (+0000)
Subject: PPC405 work in progress.
X-Git-Tag: V4.8.0~50
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=2f76653d4765be3885bb2947ca7d0f89bcbaa59c;p=freertos

PPC405 work in progress.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@231 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/Source/portable/GCC/PPC405/port.c b/Source/portable/GCC/PPC405/port.c
index 07b90fea5..02aedd2d5 100644
--- a/Source/portable/GCC/PPC405/port.c
+++ b/Source/portable/GCC/PPC405/port.c
@@ -51,6 +51,8 @@
 
 /* Library includes. */
 #include "xtime_l.h"
+#include "xintc.h"
+#include "xintc_i.h"
 
 /* Standard includes. */
 #include <string.h>
@@ -171,9 +173,6 @@ portBASE_TYPE xPortStartScheduler( void )
 {
 extern void *pxCurrentTCB;
 
-	XExc_Init();
-	XExc_mDisableExceptions( XEXC_NON_CRITICAL ) ;	
-
 	prvSetupTimerInterrupt();
 
 	XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
@@ -229,3 +228,53 @@ static unsigned portLONG ulTicks = 0;
 }
 /*-----------------------------------------------------------*/
 
+void vPortISRHandler( void *DeviceId )
+{
+Xuint32 IntrStatus;
+Xuint32 IntrMask = 1;
+int IntrNumber;
+//extern XIntc xInterruptController;
+XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr;
+	  
+    /* Get the configuration data using the device ID */
+    //CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId];
+	CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID];
+  
+    /* Get the interrupts that are waiting to be serviced */
+    IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress);
+  
+    /* Service each interrupt that is active and enabled by checking each
+     * bit in the register from LSB to MSB which corresponds to an interrupt
+     * intput signal
+     */
+    for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS;
+         IntrNumber++)
+    {
+        if (IntrStatus & 1)
+        {
+            XIntc_VectorTableEntry *TablePtr;
+      
+            /* The interrupt is active and enabled, call the interrupt
+             * handler that was setup with the specified parameter
+             */
+            TablePtr = &(CfgPtr->HandlerTable[IntrNumber]);
+            TablePtr->Handler(TablePtr->CallBackRef);
+
+			/* Clear the interrupt. */      
+            XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask);
+			break;
+        }
+        
+        /* Move to the next interrupt to check */
+        IntrMask <<= 1;
+        IntrStatus >>= 1;
+      
+        /* If there are no other bits set indicating that all interrupts
+         * have been serviced, then exit the loop
+         */
+        if (IntrStatus == 0)
+        {
+            break;
+        }
+    }
+}
diff --git a/Source/portable/GCC/PPC405/portasm.s b/Source/portable/GCC/PPC405/portasm.s
index 3810a8811..64b511ed8 100644
--- a/Source/portable/GCC/PPC405/portasm.s
+++ b/Source/portable/GCC/PPC405/portasm.s
@@ -3,10 +3,12 @@
 	.extern pxCurrentTCB
 	.extern vTaskSwitchContext
 	.extern vTaskIncrementTick
+	.extern vPortISRHandler
 
 	.global vPortStartFirstTask
 	.global vPortYield
 	.global vPortTickISR
+	.global vPortISRWrapper
 
 .set portCONTEXT_SIZE, 156
 .set portR0_OFFSET, 152
@@ -231,4 +233,9 @@ vPortTickISR:
 	portEXIT_SWITCHING_ISR
 	blr
 
+vPortISRWrapper:
 
+	portENTER_SWITCHING_ISR
+	bl vPortISRHandler
+	portEXIT_SWITCHING_ISR
+	blr
diff --git a/Source/portable/GCC/PPC405/portmacro.h b/Source/portable/GCC/PPC405/portmacro.h
index 5b6be119a..461eed85f 100644
--- a/Source/portable/GCC/PPC405/portmacro.h
+++ b/Source/portable/GCC/PPC405/portmacro.h
@@ -96,7 +96,7 @@ void vTaskExitCritical( void );
 /* Task utilities. */
 void vPortYield( void );
 #define portYIELD() asm volatile ( "SC \n\t NOP" )
-#define portYIELD_FROM_ISR()
+#define portYIELD_FROM_ISR() vTaskSwitchContext()
 /*-----------------------------------------------------------*/
 
 /* Hardware specifics. */