From: Tom Rini Date: Sat, 13 May 2017 02:33:25 +0000 (-0400) Subject: omap: Drop CONFIG_OMAP_VC_I2C_HS_MCODE X-Git-Tag: v2017.07-rc1~267 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=302acbede91d7dc8b6bedad69679b9fc63963ea2;p=u-boot omap: Drop CONFIG_OMAP_VC_I2C_HS_MCODE The symbol CONFIG_OMAP_VC_I2C_HS_MCODE always uses the default value. Restructure the comment and code such that if a need arises later to use another value we can address this then. Signed-off-by: Tom Rini --- diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index a68f1d145d..b7f79800de 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -19,14 +19,6 @@ #include #include -/* - * Define Master code if there are multiple masters on the I2C_SR bus. - * Normally not required - */ -#ifndef CONFIG_OMAP_VC_I2C_HS_MCODE -#define CONFIG_OMAP_VC_I2C_HS_MCODE 0x0 -#endif - /* Register defines and masks for VC IP Block */ /* PRM_VC_CFG_I2C_MODE */ #define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6) @@ -84,8 +76,10 @@ static void omap_vc_init(u16 speed_khz) (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT); writel(val, (*prcm)->prm_vc_cfg_i2c_clk); - val = CONFIG_OMAP_VC_I2C_HS_MCODE << - PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; + /* + * Master code if there are multiple masters on the I2C_SR bus. + */ + val = 0x0 << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; /* No HS mode for now */ val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT; writel(val, (*prcm)->prm_vc_cfg_i2c_mode); diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e86e7388dc..bb73ba774e 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1987,7 +1987,6 @@ CONFIG_OMAP_EHCI_PHY3_RESET_GPIO CONFIG_OMAP_USB2PHY2_HOST CONFIG_OMAP_USB3PHY1_HOST CONFIG_OMAP_USB_PHY -CONFIG_OMAP_VC_I2C_HS_MCODE CONFIG_OPTREX_BW CONFIG_ORIGEN CONFIG_OS1_ENV_ADDR