From: Sébastien Szymanski Date: Tue, 17 Apr 2018 15:29:31 +0000 (+0200) Subject: imx6ul: opos6ul: add SPL_DM support X-Git-Tag: v2018.05-rc3~1^2~6 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=30754ef77c3e88acb5a378d4e2c2bcce6228a118;p=u-boot imx6ul: opos6ul: add SPL_DM support Since commit commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support makes the board boot again. Fixes: commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") Signed-off-by: Sébastien Szymanski --- diff --git a/arch/arm/dts/imx6ul-opos6ul.dtsi b/arch/arm/dts/imx6ul-opos6ul.dtsi index 51095df33a..d51ad4de20 100644 --- a/arch/arm/dts/imx6ul-opos6ul.dtsi +++ b/arch/arm/dts/imx6ul-opos6ul.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2017 Armadeus Systems + * Copyright 2018 Armadeus Systems * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -99,6 +99,7 @@ /* eMMC */ &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; bus-width = <8>; @@ -161,6 +162,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul-opos6uldev.dts b/arch/arm/dts/imx6ul-opos6uldev.dts index 0e59ee57fd..9a51d1e54f 100644 --- a/arch/arm/dts/imx6ul-opos6uldev.dts +++ b/arch/arm/dts/imx6ul-opos6uldev.dts @@ -228,6 +228,7 @@ }; &uart1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; @@ -373,6 +374,7 @@ }; pinctrl_uart1: uart1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index b63f5a53ac..d5ce3f13c2 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -194,6 +194,7 @@ #size-cells = <1>; reg = <0x02000000 0x40000>; ranges; + u-boot,dm-spl; ecspi1: ecspi@02008000 { #address-cells = <1>; diff --git a/arch/arm/include/asm/arch-mx6/opos6ul.h b/arch/arm/include/asm/arch-mx6/opos6ul.h index b5363850d2..8adff67cea 100644 --- a/arch/arm/include/asm/arch-mx6/opos6ul.h +++ b/arch/arm/include/asm/arch-mx6/opos6ul.h @@ -9,8 +9,4 @@ int opos6ul_board_late_init(void); -#ifdef CONFIG_SPL_BUILD -void opos6ul_setup_uart_debug(void); -#endif - #endif diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index aa6f5facbf..98ea1f566c 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -73,6 +73,10 @@ config MX6UL_OPOS6UL select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config MX6ULL select SYS_L2CACHE_OFF diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 2de1321b56..ef70a7d323 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Armadeus Systems + * Copyright (C) 2018 Armadeus Systems * * SPDX-License-Identifier: GPL-2.0+ */ @@ -9,15 +9,12 @@ #include #include #include -#include #include #include #include #include #include #include -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -138,12 +135,6 @@ int board_late_init(void) return opos6ul_board_late_init(); } -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - return cfg->esdhc_base == USDHC1_BASE_ADDR; -} - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -153,32 +144,9 @@ int dram_init(void) #ifdef CONFIG_SPL_BUILD #include -#include #include #include -#define USDHC_PAD_CTRL ( \ - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST \ -) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 8}, -}; - -static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { .grp_addds = 0x00000030, .grp_ddrmode_ctl = 0x00020000, @@ -240,13 +208,6 @@ static struct mx6_ddr3_cfg mem_ddr = { .trasmin = 3750, }; -int board_mmc_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -} - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -282,6 +243,11 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); } +void spl_board_init(void) +{ + preloader_console_init(); +} + void board_init_f(ulong dummy) { ccgr_init(); @@ -292,10 +258,6 @@ void board_init_f(ulong dummy) /* setup GP timer */ timer_init(); - /* UART clocks enabled and gd valid - init serial console */ - opos6ul_setup_uart_debug(); - preloader_console_init(); - /* DDR initialization */ spl_dram_init(); } diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c index 646094aef4..a830dc326d 100644 --- a/board/armadeus/opos6uldev/board.c +++ b/board/armadeus/opos6uldev/board.c @@ -1,12 +1,11 @@ /* - * Copyright (C) 2017 Armadeus Systems + * Copyright (C) 2018 Armadeus Systems * * SPDX-License-Identifier: GPL-2.0+ */ #include #include -#include #include #include #include @@ -106,20 +105,3 @@ int opos6ul_board_late_init(void) return 0; } - -#ifdef CONFIG_SPL_BUILD -#define UART_PAD_CTRL ( \ - PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST \ -) - -static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -void opos6ul_setup_uart_debug(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} -#endif /* CONFIG_SPL_BUILD */ diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index a2735bc9a8..2fd684ae5e 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -1,8 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OPOS6ULDEV=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -11,6 +13,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x400 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttymxc0,115200" @@ -19,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" CONFIG_VERSION_VARIABLE=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 24e1f80474..9e853f3d84 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -15,11 +15,7 @@ #include "imx6_spl.h" #ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_GPIO -#undef CONFIG_DM_MMC -#undef CONFIG_BLK - -#define CONFIG_MXC_UART_BASE UART1_BASE +#undef CONFIG_DM_REGULATOR #endif #endif @@ -40,7 +36,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* MMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SUPPORT_EMMC_BOOT /* USB */ @@ -61,6 +56,7 @@ #endif /* LCD */ +#ifndef CONFIG_SPL_BUILD #ifdef CONFIG_VIDEO #define CONFIG_VIDEO_LOGO #define CONFIG_SPLASH_SCREEN @@ -72,6 +68,7 @@ #define CONFIG_VIDEO_MXS #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif +#endif /* Environment is stored in the eMMC boot partition */ #define CONFIG_SYS_MMC_ENV_DEV 0