From: Hans de Goede Date: Sat, 15 Aug 2015 09:58:03 +0000 (+0200) Subject: sunxi_nand_spl: Make sure the DMA controller is enabled X-Git-Tag: v2015.10-rc3~40^2~20 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=31c21471debbc9cec7466088da4fe2ee970d33b6;p=u-boot sunxi_nand_spl: Make sure the DMA controller is enabled We use DMA for nand data transfers in the SPL, so make sure the DMA controller is enabled. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b76bb83251..1ebd0a423d 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -125,7 +125,13 @@ static void nand_clock_setup(void) { struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); +#ifdef CONFIG_MACH_SUN9I + setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); +#else + setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA)); +#endif setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); }