From: richardbarry Date: Sun, 22 Nov 2009 21:38:51 +0000 (+0000) Subject: Updated to work with the latest compiler - changed the .mac file and updated the... X-Git-Tag: V6.0.3~49 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=329a6f518836b61f502b7eafbb76a5491fa373a3;p=freertos Updated to work with the latest compiler - changed the .mac file and updated the linker script. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@937 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Demo/uIP_Demo_IAR_ARM7/resource/at91SAM7X256_FLASH.icf b/Demo/uIP_Demo_IAR_ARM7/resource/at91SAM7X256_FLASH.icf index 1cfbb25b9..c9591f675 100644 --- a/Demo/uIP_Demo_IAR_ARM7/resource/at91SAM7X256_FLASH.icf +++ b/Demo/uIP_Demo_IAR_ARM7/resource/at91SAM7X256_FLASH.icf @@ -2,20 +2,20 @@ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */ /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; +define symbol __ICFEDIT_intvec_start__ = 0x00100000; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x00000100; -define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; +define symbol __ICFEDIT_region_ROM_start__ = 0x00100040; +define symbol __ICFEDIT_region_ROM_end__ = 0x0013FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x00200000; define symbol __ICFEDIT_region_RAM_end__ = 0x0020FFFF; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_svcstack__ = 0x100; define symbol __ICFEDIT_size_irqstack__ = 0x100; -define symbol __ICFEDIT_size_fiqstack__ = 0x40; -define symbol __ICFEDIT_size_undstack__ = 0x40; -define symbol __ICFEDIT_size_abtstack__ = 0x40; -define symbol __ICFEDIT_size_heap__ = 0x400; +define symbol __ICFEDIT_size_fiqstack__ = 0x0; +define symbol __ICFEDIT_size_undstack__ = 0x0; +define symbol __ICFEDIT_size_abtstack__ = 0x0; +define symbol __ICFEDIT_size_heap__ = 0x0; /**** End of ICF editor section. ###ICF###*/ diff --git a/Demo/uIP_Demo_IAR_ARM7/resource/at91sam7x-ek-flash.mac b/Demo/uIP_Demo_IAR_ARM7/resource/at91sam7x-ek-flash.mac new file mode 100644 index 000000000..5d0997b1b --- /dev/null +++ b/Demo/uIP_Demo_IAR_ARM7/resource/at91sam7x-ek-flash.mac @@ -0,0 +1,73 @@ +// ---------------------------------------------------------------------------- +// ATMEL Microcontroller Software Support - ROUSSET - +// ---------------------------------------------------------------------------- +// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR +// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE +// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, +// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, +// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// ---------------------------------------------------------------------------- +// File Name : SAM7_FLASH.mac +// Object : Generic Macro File for IAR +// 1.0 17/Aug/05 FBr : Creation +// ---------------------------------------------------------------------------- + +/********************************************************************* +* +* _InitRSTC() +* +* Function description +* Initializes the RSTC (Reset controller). +* This makes sense since the default is to not allow user resets, which makes it impossible to +* apply a second RESET via J-Link +*/ +_InitRSTC() { + __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory"); // Allow user reset +} + +/********************************************************************* +* +* _InitPLL() +* Function description +* Initializes the PMC. +* 1. Enable the Main Oscillator +* 2. Configure PLL to 96MHz +* 3. Switch Master Clock (MCK) on PLL/2 = 48MHz +*/ +_InitPLL() { + + __message "Enable Main Oscillator"; + __writeMemory32(0x00000601,0xFFFFFc20,"Memory"); // MOSC + while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1) ); + + __message "Set PLL to 96MHz"; + __writeMemory32(0x10191c05,0xFFFFFc2c,"Memory"); // LOCK + while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4) ); + + __message "Set Master Clock to 48MHz"; + __writeMemory32(0x00000004,0xFFFFFc30,"Memory"); // MCKRDY + while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8) ); + __writeMemory32(0x00000007,0xFFFFFc30,"Memory"); // MCKRDY + while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8) ); + + // Set 1 WS for Flash accesses on each EFC + __writeMemory32(0x00480100,0xFFFFFF60,"Memory"); + __writeMemory32(0x00480100,0xFFFFFF70,"Memory"); +} + +/********************************************************************* +* +* execUserReset() : JTAG set initially to Full Speed +*/ +execUserReset() { + __message "execUserReset()"; + __hwReset(0); // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz) + _InitPLL(); // Allow to debug at JTAG Full Speed + _InitRSTC(); // Enable User Reset to allow execUserReset() execution +} + diff --git a/Demo/uIP_Demo_IAR_ARM7/rtosdemo.ewd b/Demo/uIP_Demo_IAR_ARM7/rtosdemo.ewd index 048be6e38..98c02c31e 100644 --- a/Demo/uIP_Demo_IAR_ARM7/rtosdemo.ewd +++ b/Demo/uIP_Demo_IAR_ARM7/rtosdemo.ewd @@ -37,7 +37,7 @@