From: Fabio Estevam Date: Fri, 1 Aug 2014 11:50:00 +0000 (-0300) Subject: mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offset X-Git-Tag: v2014.10-rc2~52^2~28 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=338c9da6053c7e02264fbec7568c271bb503ab1a;p=u-boot mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offset According to the Reference Manual the 'spdif0_clk_podf' field of register CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset definitions accordingly. Signed-off-by: Fabio Estevam --- diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 0fcef69768..9afe788389 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -335,8 +335,8 @@ struct mxc_ccm_reg { #endif #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0x7 << 25) #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET 25 -#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x7 << 19) -#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET 19 +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x7 << 22) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET 22 #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_MASK (0x3 << 20) #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_OFFSET 20 #define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK (0x7 << 12)