From: Stefan Roese Date: Tue, 14 Aug 2007 13:00:42 +0000 (+0200) Subject: Merge with /home/stefan/git/u-boot/zeus X-Git-Tag: v1.3.0-rc1~19^2~17^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=34886bbea20b577e8bdef81f3831319f1876b9b7;p=u-boot Merge with /home/stefan/git/u-boot/zeus --- 34886bbea20b577e8bdef81f3831319f1876b9b7 diff --cc MAKEALL index 61a4d4570d,00cb6b5351..8d1830f05c --- a/MAKEALL +++ b/MAKEALL @@@ -82,16 -82,16 +82,17 @@@ LIST_4xx=" CPCI405DT CPCI440 CPCIISER4 CRAYL1 \ csb272 csb472 DASA_SIM DP405 \ DU405 ebony ERIC EXBITGEN \ - G2000 HH405 HUB405 JSE \ - KAREF katmai luan lwmon5 \ - METROBOX MIP405 MIP405T ML2 \ - ml300 ocotea OCRTC ORSG \ - p3p440 PCI405 pcs440ep PIP405 \ - PLU405 PMC405 PPChameleonEVB sbc405 \ - sc3 sequoia sequoia_nand taihu \ - taishan VOH405 VOM405 W7OLMC \ - W7OLMG walnut WUH405 XPEDITE1K \ - yellowstone yosemite yucca zeus \ + G2000 HH405 hcu4 hcu5 \ + HUB405 JSE KAREF katmai \ + luan lwmon5 METROBOX MIP405 \ + MIP405T ML2 ml300 ocotea \ + OCRTC ORSG p3p440 PCI405 \ + pcs440ep PIP405 PLU405 PMC405 \ + PPChameleonEVB sbc405 sc3 sequoia \ - sequoia_nand taishan VOH405 VOM405 \ - W7OLMC W7OLMG walnut WUH405 \ - XPEDITE1K yellowstone yosemite yucca \ ++ sequoia_nand taihu taishan VOH405 \ ++ VOM405 W7OLMC W7OLMG walnut \ ++ WUH405 XPEDITE1K yellowstone yosemite \ ++ yucca zeus \ " ######################################################################### diff --cc Makefile index 8282c71d15,d75f8fdddb..a647d54be2 --- a/Makefile +++ b/Makefile @@@ -1258,8 -1252,11 +1258,11 @@@ rainier_nand_config: unconfi @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk sc3_config:unconfig - @./mkconfig $(@:_config=) ppc ppc4xx sc3 + @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3 + taihu_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc + taishan_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc diff --cc post/cpu/ppc4xx/uart.c index 0aeed75ae6,0cffda5fca..5f14967fee --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@@ -84,49 -137,7 +137,53 @@@ DECLARE_GLOBAL_DATA_PTR; ++<<<<<<< master +#if !defined(CFG_EXT_SERIAL_CLOCK) +static void serial_divs (int baudrate, unsigned long *pudiv, + unsigned short *pbdiv) +{ + sys_info_t sysinfo; + unsigned long div; /* total divisor udiv * bdiv */ + unsigned long umin; /* minimum udiv */ + unsigned short diff; /* smallest diff */ + unsigned long udiv; /* best udiv */ + unsigned short idiff; /* current diff */ + unsigned short ibdiv; /* current bdiv */ + unsigned long i; + unsigned long est; /* current estimate */ + + get_sys_info(&sysinfo); + + udiv = 32; /* Assume lowest possible serial clk */ + div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */ + umin = sysinfo.pllOpbDiv << 1; /* 2 x OPB divisor */ + diff = 32; /* highest possible */ + + /* i is the test udiv value -- start with the largest + * possible (32) to minimize serial clock and constrain + * search to umin. + */ + for (i = 32; i > umin; i--) { + ibdiv = div / i; + est = i * ibdiv; + idiff = (est > div) ? (est-div) : (div-est); + if (idiff == 0) { + udiv = i; + break; /* can't do better */ + } else if (idiff < diff) { + udiv = i; /* best so far */ + diff = idiff; /* update lowest diff*/ + } + } + + *pudiv = udiv; + *pbdiv = div / udiv; +} +#endif + ++======= + #if defined(CONFIG_440) ++>>>>>>> zeus static int uart_post_init (unsigned long dev_base) { unsigned long reg;