From: Philipp Tomsich Date: Fri, 16 Feb 2018 15:07:25 +0000 (+0100) Subject: rockchip: clk: rk3368: handle clk_enable requests for GMAC X-Git-Tag: v2018.03-rc4~27^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=35a69a3b01298e605025f4758d79f667463c9ee1;p=u-boot rockchip: clk: rk3368: handle clk_enable requests for GMAC Since commit ba1f96672522 ("net: designware: add clock support"), the designware GMAC driver enables all referenced clocks. While this is a no-op for the RK3368 during boot-up (reset behaviour has all the clock gates open anyway), we still need to handle the clock-ids passed in the enable op of the clock-driver and return a success. This change extends the RK3368 clk driver to: (a) provide a enable op (b) signals success to the caller when the clocks for the GMAC are enabled (no actual action is necessary as the gates are open after reset) References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich Tested-by: Klaus Goger --- diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 3ac9add527..ea00f1fc9c 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -568,12 +568,31 @@ static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; } +static int rk3368_clk_enable(struct clk *clk) +{ + switch (clk->id) { + case SCLK_MAC: + case SCLK_MAC_RX: + case SCLK_MAC_TX: + case SCLK_MACREF: + case SCLK_MACREF_OUT: + case ACLK_GMAC: + case PCLK_GMAC: + /* Required to successfully probe the Designware GMAC driver */ + return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; +} + static struct clk_ops rk3368_clk_ops = { .get_rate = rk3368_clk_get_rate, .set_rate = rk3368_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3368_clk_set_parent, #endif + .enable = rk3368_clk_enable, }; static int rk3368_clk_probe(struct udevice *dev)