From: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Sun, 31 Aug 2008 16:24:24 +0000 (+0200)
Subject: avr32: Use board_postclk_init instead of gclk_init
X-Git-Tag: v2009.06-rc1~145^2~1^2~4^2~4
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=36d375faf5cff98e8dca32aabbbb1ec6036437dd;p=u-boot

avr32: Use board_postclk_init instead of gclk_init

Replace the avr32-specific gclk_init() board hook with the standard
board_postclk_init() hook which is supposed to run at the same point
during initialization.

Provide a dummy weak alias for boards not implementing this hook. The
cost of this is:
  - 2 bytes for the dummy function (retal 0)
  - 2 bytes for each unnecessary function call (short rcall)

which is a pretty small price to pay for avoiding lots of #ifdef
clutter. In this particular case, all boards probably end up slightly
smaller because we avoid the conditional checking if the gclk_init
symbol is NULL.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
---

diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
index bf432cba85..8670527891 100644
--- a/board/miromico/hammerhead/hammerhead.c
+++ b/board/miromico/hammerhead/hammerhead.c
@@ -100,9 +100,10 @@ void board_init_info(void)
 	gd->bd->bi_phy_id[0] = 0x01;
 }
 
-void gclk_init(void)
+int board_postclk_init(void)
 {
 	/* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
 	gclk_enable_output(3, PORTMUX_DRIVE_LOW);
 	gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000);
+	return 0;
 }
diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 1a1370289d..0ba836180e 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -65,9 +65,6 @@ int cpu_init(void)
 	sysreg_write(EVBA, (unsigned long)&_evba);
 	asm volatile("csrf	%0" : : "i"(SYSREG_EM_OFFSET));
 
-	if(gclk_init)
-		gclk_init();
-
 	return 0;
 }
 
diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h
index b2710a4ba8..21545a3c18 100644
--- a/include/asm-avr32/arch-at32ap700x/clk.h
+++ b/include/asm-avr32/arch-at32ap700x/clk.h
@@ -84,7 +84,6 @@ static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
 #endif
 
 extern void clk_init(void);
-extern void gclk_init(void) __attribute__((weak));
 
 /* Board code may need the SDRAM base clock as a compile-time constant */
 #define SDRAMC_BUS_HZ	(MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
diff --git a/lib_avr32/board.c b/lib_avr32/board.c
index d6423d4f3f..19d76d2cac 100644
--- a/lib_avr32/board.c
+++ b/lib_avr32/board.c
@@ -47,6 +47,13 @@ static unsigned long mem_malloc_start = 0;
 static unsigned long mem_malloc_end = 0;
 static unsigned long mem_malloc_brk = 0;
 
+/* Weak aliases for optional board functions */
+static int __do_nothing(void)
+{
+	return 0;
+}
+int board_postclk_init(void) __attribute__((weak, alias("__do_nothing")));
+
 /* The malloc area is right below the monitor image in RAM */
 static void mem_malloc_init(void)
 {
@@ -187,6 +194,7 @@ void board_init_f(ulong board_type)
 	/* Perform initialization sequence */
 	board_early_init_f();
 	cpu_init();
+	board_postclk_init();
 	env_init();
 	init_baudrate();
 	serial_init();