From: uz <uz@b7a2c559-68d2-44c3-8de9-860c34a00d81>
Date: Sat, 13 Nov 2010 16:57:42 +0000 (+0000)
Subject: Force inclusion of the load address.
X-Git-Tag: V2.13.3~598
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=36dc80619354ec280ba47bbbed278cdda03e9691;p=cc65

Force inclusion of the load address.


git-svn-id: svn://svn.cc65.org/cc65/trunk@4857 b7a2c559-68d2-44c3-8de9-860c34a00d81
---

diff --git a/src/ld65/cfg/c64.cfg b/src/ld65/cfg/c64.cfg
index 3eabf2e3d..1ccf4d10b 100644
--- a/src/ld65/cfg/c64.cfg
+++ b/src/ld65/cfg/c64.cfg
@@ -1,22 +1,25 @@
-SYMBOLS {
-    __STACKSIZE__: type = weak, value = $0800; # 2k stack
+SYMBOLS {                                                          
+    __LOADADDR__:  type = import;
+    __STACKSIZE__: type = weak,   value = $0800; # 2k stack
 }
 MEMORY {
-    ZP:     file = "", define = yes, start = $0002, size = $001A;
-    HEADER: file = %O,               start = $07FF, size = $000E;
-    RAM:    file = %O, define = yes, start = $080D, size = $C7F3 - __STACKSIZE__;
+    ZP:       file = "", define = yes, start = $0002, size = $001A;
+    LOADADDR: file = %O,               start = $07FF, size = $0002;
+    HEADER:   file = %O,               start = $07FF, size = $000E;
+    RAM:      file = %O, define = yes, start = $080D, size = $C7F3 - __STACKSIZE__;
 }
 SEGMENTS {
-    EXEHDR:   load = HEADER, type = ro;
-    STARTUP:  load = RAM,    type = ro;
-    LOWCODE:  load = RAM,    type = ro,                optional = yes;
-    INIT:     load = RAM,    type = ro,  define = yes, optional = yes;
-    CODE:     load = RAM,    type = ro;
-    RODATA:   load = RAM,    type = ro;
-    DATA:     load = RAM,    type = rw;
-    ZPSAVE:   load = RAM,    type = bss;
-    BSS:      load = RAM,    type = bss, define = yes;
-    ZEROPAGE: load = ZP,     type = zp;
+    LOADADDR: load = LOADADDR, type = ro;
+    EXEHDR:   load = HEADER,   type = ro;
+    STARTUP:  load = RAM,      type = ro;
+    LOWCODE:  load = RAM,      type = ro,                optional = yes;
+    INIT:     load = RAM,      type = ro,  define = yes, optional = yes;
+    CODE:     load = RAM,      type = ro;
+    RODATA:   load = RAM,      type = ro;
+    DATA:     load = RAM,      type = rw;
+    ZPSAVE:   load = RAM,      type = bss;
+    BSS:      load = RAM,      type = bss, define = yes;
+    ZEROPAGE: load = ZP,       type = zp;
 }
 FEATURES {
     CONDES: segment = INIT,