From: Minghuan Lian Date: Fri, 20 Oct 2017 02:45:50 +0000 (+0800) Subject: dm: pci: change bus number register setting compliant with Linux X-Git-Tag: v2018.01-rc1~93 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3977dcd559e392b9a2f3c69e317527cbe8b6ae15;p=u-boot dm: pci: change bus number register setting compliant with Linux This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the current maximum PCI bus number, when start to scan this controller. Signed-off-by: Minghuan Lian Signed-off-by: Hou Zhiqiang Reviewed-by: Bin Meng --- diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index ee9a854bda..c2bc32678a 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -181,8 +181,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) /* Configure bus number registers */ dm_pci_write_config8(dev, PCI_PRIMARY_BUS, - PCI_BUS(dm_pci_get_bdf(dev))); - dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus); + PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq); + dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq); dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff); if (pci_mem) { @@ -257,7 +257,7 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus) pci_io = ctlr_hose->pci_io; /* Configure bus number registers */ - dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus); + dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq); if (pci_mem) { /* Round memory allocator to 1MB boundary */ diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 202cfe9d03..a19885501c 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -162,6 +162,7 @@ static uintptr_t set_cfg_address(struct pcie_dw_mvebu *pcie, /* Accessing root port configuration space. */ va_address = (uintptr_t)pcie->ctrl_base; } else { + d = PCI_MASK_BUS(d) | (PCI_BUS(d) - pcie->first_busno); writel(d << 8, pcie->ctrl_base + PCIE_ATU_LOWER_TARGET); va_address = (uintptr_t)pcie->cfg_base; } diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 0cb7f6d564..503fd5e507 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -255,7 +255,7 @@ int ls_pcie_conf_address(struct udevice *bus, pci_dev_t bdf, return 0; } - busdev = PCIE_ATU_BUS(PCI_BUS(bdf)) | + busdev = PCIE_ATU_BUS(PCI_BUS(bdf) - bus->seq) | PCIE_ATU_DEV(PCI_DEV(bdf)) | PCIE_ATU_FUNC(PCI_FUNC(bdf));