From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Wed, 20 May 2009 16:30:32 +0000 (-0400)
Subject: 85xx: Add PIB support at CS4/CS5 for MPC8569MDS
X-Git-Tag: v2009.06~6
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=399b53cbab0b377ac4c5c16c19c6e41b68a9c719;p=u-boot

85xx: Add PIB support at CS4/CS5 for MPC8569MDS

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Yu Liu <Yu.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 21a7adfbad..0ee40c6180 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -156,10 +156,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_BR0_PRELIM		0xfe000801
 #define	CONFIG_SYS_OR0_PRELIM		0xfe000ff7
 
-/*Chip slelect 1 - BCSR*/
+/*Chip select 1 - BCSR*/
 #define CONFIG_SYS_BR1_PRELIM		0xf8000801
 #define	CONFIG_SYS_OR1_PRELIM		0xffffe9f7
 
+/*Chip select 4 - PIB*/
+#define CONFIG_SYS_BR4_PRELIM		0xf8008801
+#define CONFIG_SYS_OR4_PRELIM		0xffffe9f7
+
+/*Chip select 5 - PIB*/
+#define CONFIG_SYS_BR5_PRELIM		0xf8010801
+#define CONFIG_SYS_OR5_PRELIM		0xffffe9f7
+
 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* sectors per device */
 #undef	CONFIG_SYS_FLASH_CHECKSUM