From: Dan Murphy <dmurphy@ti.com>
Date: Wed, 30 Mar 2016 17:58:37 +0000 (-0500)
Subject: board: ti: DRA7: Add DP83867 TI phy for rev c
X-Git-Tag: v2016.05-rc1~63
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=39fbac91e1987b6c4d7699d2adef41cb65bb7c96;p=u-boot

board: ti: DRA7: Add DP83867 TI phy for rev c

Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---

diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 25f203124f..9bd71d87ba 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -27,6 +27,7 @@
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
 #include <ti-usb-phy-uboot.h>
+#include <miiphy.h>
 
 #include "mux_data.h"
 #include "../common/board_detect.h"
@@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis)
 	if (*omap_si_rev == DRA722_ES1_0)
 		cpsw_data.active_slave = 1;
 
+	if (board_is_dra72x_revc_or_later()) {
+		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+		cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+	}
+
 	ret = cpsw_register(&cpsw_data);
 	if (ret < 0)
 		printf("Error %d registering CPSW switch\n", ret);
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index c0795ab47f..7734e8db94 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -155,6 +155,7 @@
 #define CONFIG_MII			/* Required in net/eth.c */
 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
 #define CONFIG_PHYLIB
+#define CONFIG_PHY_TI
 
 /* SPI */
 #undef	CONFIG_OMAP3_SPI