From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 5 Sep 2013 06:41:19 +0000 (+0200)
Subject: ARM: zynq: ddrc: Setup half of memory only for ECC case
X-Git-Tag: v2015.04-rc1~39^2~11
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3ad87ca18203f8b0de0e30b7c12d2ffadf2d8553;p=u-boot

ARM: zynq: ddrc: Setup half of memory only for ECC case

Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/cpu/armv7/zynq/ddrc.c b/arch/arm/cpu/armv7/zynq/ddrc.c
index d74f8dbbc4..5b20accbcb 100644
--- a/arch/arm/cpu/armv7/zynq/ddrc.c
+++ b/arch/arm/cpu/armv7/zynq/ddrc.c
@@ -42,6 +42,8 @@ void zynq_ddrc_init(void)
 		 */
 		/* cppcheck-suppress nullPointer */
 		memset((void *)0, 0, 1 * 1024 * 1024);
+
+		gd->ram_size /= 2;
 	} else {
 		puts("ECC disabled ");
 	}