From: Dinh Nguyen <dinguyen@opensource.altera.com>
Date: Mon, 30 Mar 2015 22:01:18 +0000 (-0500)
Subject: arm: socfpga: fix uart0 pin mux configuration
X-Git-Tag: v2015.07-rc1~61^2~8
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3c38de5464b612a51b73c8b01a8f035adea7a6a4;p=u-boot

arm: socfpga: fix uart0 pin mux configuration

commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration"
incorrectly set the muxing for UART0 on the Cyclone V DK.

This fixes it up so UART0 is working again.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/board/altera/socfpga/pinmux_config.c b/board/altera/socfpga/pinmux_config.c
index 61cdc73fa3..7e7a18484f 100644
--- a/board/altera/socfpga/pinmux_config.c
+++ b/board/altera/socfpga/pinmux_config.c
@@ -54,8 +54,8 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
 	2, /* GENERALIO14 */
 	0, /* GENERALIO15 */
 	0, /* GENERALIO16 */
-	0, /* GENERALIO17 */
-	0, /* GENERALIO18 */
+	2, /* GENERALIO17 */
+	2, /* GENERALIO18 */
 	0, /* GENERALIO19 */
 	0, /* GENERALIO20 */
 	0, /* GENERALIO21 */