From: Benoît Thébaudeau Date: Thu, 27 Sep 2012 10:26:54 +0000 (+0000) Subject: mx25: Fix decode_pll X-Git-Tag: v2013.01-rc1~194 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3c76add2628116872befc230cdd4df8e3a6ac5e3;p=u-boot mx25: Fix decode_pll The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic --- diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 4f1aad04e6..d34e84cf9a 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -48,7 +48,7 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) { unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT) & CCM_PLL_MFI_MASK; - unsigned int mfn = (pll >> CCM_PLL_MFN_SHIFT) + int mfn = (pll >> CCM_PLL_MFN_SHIFT) & CCM_PLL_MFN_MASK; unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT) & CCM_PLL_MFD_MASK; @@ -56,9 +56,12 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) & CCM_PLL_PD_MASK; mfi = mfi <= 5 ? 5 : mfi; + mfn = mfn >= 512 ? mfn - 1024 : mfn; + mfd += 1; + pd += 1; - return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn), - (mfd + 1) * (pd + 1)); + return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn), + mfd * pd); } static ulong imx_get_mpllclk(void)