From: Po Liu Date: Wed, 26 Nov 2014 01:38:48 +0000 (+0800) Subject: powerpc/c29xpcie: Add secure boot support X-Git-Tag: v2015.04-rc1~61^2~26 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3ca49c425f523d41bcec8a0eac24cce2d6a0da98;p=u-boot powerpc/c29xpcie: Add secure boot support Add NOR and SPI flash secure boot target for C29XPCIE board. Signed-off-by: Po Liu Signed-off-by: Mingkai.Hu Reviewed-by: York Sun --- diff --git a/board/freescale/c29xpcie/MAINTAINERS b/board/freescale/c29xpcie/MAINTAINERS index db2e5e3bd3..33088396f5 100644 --- a/board/freescale/c29xpcie/MAINTAINERS +++ b/board/freescale/c29xpcie/MAINTAINERS @@ -6,3 +6,5 @@ F: include/configs/C29XPCIE.h F: configs/C29XPCIE_defconfig F: configs/C29XPCIE_NAND_defconfig F: configs/C29XPCIE_SPIFLASH_defconfig +F: configs/C29XPCIE_NOR_SECBOOT_defconfig +F: configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig new file mode 100644 index 0000000000..86751cf8ac --- /dev/null +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_C29XPCIE=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file mode 100644 index 0000000000..d1a42b27eb --- /dev/null +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_C29XPCIE=y diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index ecb3d7b25f..e24b923368 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -581,4 +581,6 @@ #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND +#include + #endif /* __CONFIG_H */