From: richardbarry Date: Mon, 29 Mar 2010 14:01:36 +0000 (+0000) Subject: Modify Cortus save and restore macros to save and restore the entire context, so... X-Git-Tag: V6.0.5~9 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3d63a3d82947a3eb8eb1af58827aa8de725ece97;p=freertos Modify Cortus save and restore macros to save and restore the entire context, so as not to rely on anything the compiler is doing. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1009 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Source/portable/GCC/CORTUS_APS3/port.c b/Source/portable/GCC/CORTUS_APS3/port.c index 5a3c21486..d55d54316 100644 --- a/Source/portable/GCC/CORTUS_APS3/port.c +++ b/Source/portable/GCC/CORTUS_APS3/port.c @@ -76,39 +76,28 @@ static void prvSetupTimerInterrupt( void ); portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) { - /* For the time being, mimic the stack when using the - __attribute__((interrupt)) plus the extra caller saved registers. */ - This leaves a buffer of two works unused. */ - pxTopOfStack -= 18; + /* Make space on the stack for the context - this leaves a couple of spaces + empty. */ + pxTopOfStack -= 20; - /* RTT */ - pxTopOfStack[ 16 ] = ( portSTACK_TYPE )pxCode; - - /* PSR */ + /* Fill the registers with known values to assist debugging. */ + pxTopOfStack[ 16 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL; pxTopOfStack[ 15 ] = portINITIAL_PSR; - - /* R14 and R15 aka FuncSP and LR, respectively */ - pxTopOfStack[ 14 ] = 0x00000000; - pxTopOfStack[ 13 ] = ( portSTACK_TYPE )( pxTopOfStack + 17 ); - - /* R7 to R2 */ - pxTopOfStack[ 12 ] = 0x07070707; - pxTopOfStack[ 11 ] = 0x06060606; - pxTopOfStack[ 10 ] = 0x05050505; - pxTopOfStack[ 9 ] = 0x04040404; - pxTopOfStack[ 8 ] = 0x03030303; - pxTopOfStack[ 7 ] = ( portSTACK_TYPE )pvParameters; - - /* Set the Interrupt Priority on Task entry. */ - pxTopOfStack[ 6 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL; - - /* R13 to R8. */ - pxTopOfStack[ 5 ] = 0x0D0D0D0D; - pxTopOfStack[ 4 ] = 0x0C0C0C0C; - pxTopOfStack[ 3 ] = 0x0B0B0B0B; - pxTopOfStack[ 2 ] = 0x0A0A0A0A; - pxTopOfStack[ 1 ] = 0x09090909; - pxTopOfStack[ 0 ] = 0x08080808; + pxTopOfStack[ 14 ] = ( unsigned long ) pxCode; + pxTopOfStack[ 13 ] = 0x00000000UL; /* R15. */ + pxTopOfStack[ 12 ] = 0x00000000UL; /* R14. */ + pxTopOfStack[ 11 ] = 0x0d0d0d0dUL; + pxTopOfStack[ 10 ] = 0x0c0c0c0cUL; + pxTopOfStack[ 9 ] = 0x0b0b0b0bUL; + pxTopOfStack[ 8 ] = 0x0a0a0a0aUL; + pxTopOfStack[ 7 ] = 0x09090909UL; + pxTopOfStack[ 6 ] = 0x08080808UL; + pxTopOfStack[ 5 ] = 0x07070707UL; + pxTopOfStack[ 4 ] = 0x06060606UL; + pxTopOfStack[ 3 ] = 0x05050505UL; + pxTopOfStack[ 2 ] = 0x04040404UL; + pxTopOfStack[ 1 ] = 0x03030303UL; + pxTopOfStack[ 0 ] = ( unsigned long ) pvParameters; return pxTopOfStack; } @@ -129,18 +118,6 @@ portBASE_TYPE xPortStartScheduler( void ) /* Restore callee saved registers. */ portRESTORE_CONTEXT(); - /* Mimic an ISR epilogue to start the task executing. */ - asm __volatile__( \ - "ldd r6, [r1]+0x20 \n" \ - "mov psr, r6 \n" \ - "mov rtt, r7 \n" \ - "ldd r14, [r1]+0x18 \n" \ - "ldq r4, [r1]+0x8 \n" \ - "ldd r2, [r1] \n" \ - "add r1, #0x28 \n" \ - "rti \n" \ - ); \ - /* Should not get here. */ return 0; } @@ -159,24 +136,19 @@ static void prvSetupTimerInterrupt( void ) } /*-----------------------------------------------------------*/ -void interrupt_handler( portIRQ_TRAP_YIELD ) +/* Trap 31 handler. */ +void interrupt31_handler( void ) __attribute__((naked)); +void interrupt31_handler( void ) { - /* Save remaining registers. */ portSAVE_CONTEXT(); - - vTaskSwitchContext(); - - /* Restore the first lot of registers, the remains will be restored when - this function exits. */ + __asm volatile ( "call vTaskSwitchContext" ); portRESTORE_CONTEXT(); } /*-----------------------------------------------------------*/ -/* Timer tick interrupt handler */ -void interrupt_handler( IRQ_COUNTER1 ) +static void prvProcessTick( void ) __attribute__((noinline)); +static void prvProcessTick( void ) { - portSAVE_CONTEXT(); - vTaskIncrementTick(); #if configUSE_PREEMPTION == 1 @@ -185,7 +157,15 @@ void interrupt_handler( IRQ_COUNTER1 ) /* Clear the Tick Interrupt. */ counter1->expired = 0; +} +/*-----------------------------------------------------------*/ +/* Timer 1 interrupt handler, used for tick interrupt. */ +void interrupt7_handler( void ) __attribute__((naked)); +void interrupt7_handler( void ) +{ + portSAVE_CONTEXT(); + prvProcessTick(); portRESTORE_CONTEXT(); } /*-----------------------------------------------------------*/ diff --git a/Source/portable/GCC/CORTUS_APS3/portmacro.h b/Source/portable/GCC/CORTUS_APS3/portmacro.h index 6ee5a7bdf..cb3de7fc7 100644 --- a/Source/portable/GCC/CORTUS_APS3/portmacro.h +++ b/Source/portable/GCC/CORTUS_APS3/portmacro.h @@ -92,7 +92,7 @@ extern "C" { #define portSTACK_GROWTH ( -1 ) #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) #define portBYTE_ALIGNMENT 4 -#define portNOP() __asm__ volatile ( "mov r0,r0; nop" ) +#define portNOP() __asm__ volatile ( "mov r0, r0" ) #define portCRITICAL_NESTING_IN_TCB 1 #define portIRQ_TRAP_YIELD 31 #define portKERNEL_INTERRUPT_PRIORITY_LEVEL 0 @@ -120,36 +120,47 @@ extern void vTaskExitCritical( void ); /*---------------------------------------------------------------------------*/ -#define portYIELD_FROM_ISR() vTaskSwitchContext() +#define portYIELD_FROM_ISR( xHigherPriorityTaskWoken ) if( xHigherPriorityTaskWoken != pdFALSE ) vTaskSwitchContext() /*---------------------------------------------------------------------------*/ #define portSAVE_CONTEXT() \ - asm __volatile__( \ - "sub r1, #0x1c \n" /* Make space on the stack. */ \ - "stq r8, [r1] \n" /* Store the remaining context registers. */ \ - "std r12, [r1]+0x10 \n" \ - "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \ - "ldub r3, [r2]+2 \n" /* Load the current interrupt mask. */ \ - "st r3, [r1]+0x18 \n" /* Store the interrupt mask on the stack. */ \ - "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the pointer to the TCB. */ \ - "st r1, [r2] \n" /* Save the stack pointer into the TCB. */ \ - "mov r14, r1 \n" /* Compiler expects r14 to be set to the function stack. */ \ - :::"r2","r3","r4","r5","r15" ); /* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */ + asm __volatile__ \ + ( \ + "sub r1, #68 \n" /* Make space on the stack for the context. */ \ + "std r2, [r1] + 0 \n" \ + "stq r4, [r1] + 8 \n" \ + "stq r8, [r1] + 24 \n" \ + "stq r12, [r1] + 40 \n" \ + "mov r6, rtt \n" \ + "mov r7, psr \n" \ + "std r6, [r1] + 56 \n" \ + "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \ + "ldub r3, [r2] + 2 \n" /* Load the current interrupt mask. */ \ + "st r3, [r1]+ 64 \n" /* Store the interrupt mask on the stack. */ \ + "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the pointer to the TCB. */ \ + "st r1, [r2] \n" /* Save the stack pointer into the TCB. */ \ + "mov r14, r1 \n" /* Compiler expects r14 to be set to the function stack. */ \ + ); /*---------------------------------------------------------------------------*/ -#define portRESTORE_CONTEXT() \ - asm __volatile__( \ - "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the TCB to find the stack pointer and context. */ \ - "ld r1, [r2] \n" \ - "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \ - "ld r3, [r1]+0x18 \n" /* Load the previous interrupt mask. */ \ - "stb r3, [r2]+2 \n" /* Set the current interrupt mask to be the previous. */ \ - "ldd r12, [r1]+0x10 \n" /* Restore the callee saved registers. Caller saved registers are restored by the function exit. */ \ - "ldq r8, [r1] \n" \ - "add r1, #0x1c \n" \ - "mov r14, r1 \n" \ - ); +#define portRESTORE_CONTEXT() \ + asm __volatile__( \ + "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the TCB to find the stack pointer and context. */ \ + "ld r1, [r2] \n" \ + "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \ + "ld r3, [r1] + 64 \n" /* Load the previous interrupt mask. */ \ + "stb r3, [r2] + 2 \n" /* Set the current interrupt mask to be the previous. */ \ + "ldd r6, [r1] + 56 \n" /* Restore context. */ \ + "mov rtt, r6 \n" \ + "mov psr, r7 \n" \ + "ldd r2, [r1] + 0 \n" \ + "ldq r4, [r1] + 8 \n" \ + "ldq r8, [r1] + 24 \n" \ + "ldq r12, [r1] + 40 \n" \ + "add r1, #68 \n" \ + "rti \n" \ + ); /*---------------------------------------------------------------------------*/