From: Øyvind Harboe <oyvind.harboe@zylin.com>
Date: Sun, 8 Aug 2010 17:21:04 +0000 (+0200)
Subject: arm7/9: fix "reset run + halt"
X-Git-Tag: v0.5.0-rc1~464
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3e71449adec41bf2a9f498d027aae0ba6e83721f;p=openocd

arm7/9: fix "reset run + halt"

if polling is off, then "reset run + halt" would fail
since halt incorrectly assumed the target was in the
reset state as it is the internal poll implementation
that moves the sw tracking of the target state out
of the reset state.

To reproduce:

> reset run; halt
JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)
BUG: arm7/9 does not support halt during reset. This is handled in arm7_9_assert_reset()

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
---

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index abfb21bd..3bbe8b07 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1074,24 +1074,29 @@ int arm7_9_deassert_reset(struct target *target)
 	/* deassert reset lines */
 	jtag_add_reset(0, 0);
 
+	/* In case polling is disabled, we need to examine the
+	 * target and poll here for this target to work correctly.
+	 *
+	 * Otherwise, e.g. halt will fail afterwards with bogus
+	 * error messages as halt will believe that reset is
+	 * still in effect.
+	 */
+	if ((retval = target_examine_one(target)) != ERROR_OK)
+		return retval;
+
+	if ((retval = target_poll(target)) != ERROR_OK)
+	{
+		return retval;
+	}
+
 	enum reset_types jtag_reset_config = jtag_get_reset_config();
 	if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
 	{
 		LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
-		/* set up embedded ice registers again */
-		if ((retval = target_examine_one(target)) != ERROR_OK)
-			return retval;
-
-		if ((retval = target_poll(target)) != ERROR_OK)
-		{
-			return retval;
-		}
-
 		if ((retval = target_halt(target)) != ERROR_OK)
 		{
 			return retval;
 		}
-
 	}
 	return retval;
 }
diff --git a/src/target/target_type.h b/src/target/target_type.h
index d3db8b55..10fcd4fd 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008,2009 Øyvind Harboe                            *
+ *   Copyright (C) 2007-2010 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   Copyright (C) 2008 by Spencer Oliver                                  *
@@ -73,6 +73,17 @@ struct target_type
 	 *
 	 */
 	int (*assert_reset)(struct target *target);
+	/**
+	 * The implementation is responsible for polling the
+	 * target such that target->state reflects the
+	 * state correctly.
+	 *
+	 * Otherwise the following would fail, as there will not
+	 * be any "poll" invoked inbetween the "reset run" and
+	 * "halt".
+	 *
+	 * reset run; halt
+     */
 	int (*deassert_reset)(struct target *target);
 	int (*soft_reset_halt_imp)(struct target *target);
 	int (*soft_reset_halt)(struct target *target);