From: Simon Glass <sjg@chromium.org>
Date: Thu, 6 Apr 2017 18:47:04 +0000 (-0600)
Subject: arm: freescale: Rename initdram() to fsl_initdram()
X-Git-Tag: v2017.05-rc2~16
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3eace37e5098c7f020a45a3672c062cd4ea199a0;p=u-boot

arm: freescale: Rename initdram() to fsl_initdram()

This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index ea6c090e0b..d446527616 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/system.h>
@@ -876,7 +877,7 @@ void update_early_mmu_table(void)
 
 __weak int dram_init(void)
 {
-	initdram();
+	fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 3bf2e49762..d16a69fc98 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -164,7 +164,7 @@ void board_mem_sleep_setup(void)
 }
 #endif
 
-int initdram(void)
+int fsl_initdram(void)
 {
 	phys_size_t dram_size;
 
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 909fc56275..d81d8abc9b 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -162,7 +162,7 @@ int dram_init(void)
 	 * before accessing DDR SPD.
 	 */
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-	return initdram();
+	return fsl_initdram();
 }
 
 #ifdef CONFIG_FSL_ESDHC
diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index db350e27b8..2643f5bf4a 100644
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -108,7 +108,7 @@ found:
 #endif
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 	phys_size_t dram_size;
 
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 538bba53da..2df63e468d 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -153,7 +154,7 @@ int dram_init(void)
 	 * before accessing DDR SPD.
 	 */
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-	initdram();
+	fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c
index 2f133db0a6..36d27ecfae 100644
--- a/board/freescale/ls1043ardb/ddr.c
+++ b/board/freescale/ls1043ardb/ddr.c
@@ -170,7 +170,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
 }
 #endif
 
-int initdram(void)
+int fsl_initdram(void)
 {
 	phys_size_t dram_size;
 
diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c
index 481ed44046..d37af34a9c 100644
--- a/board/freescale/ls1046aqds/ddr.c
+++ b/board/freescale/ls1046aqds/ddr.c
@@ -92,7 +92,7 @@ found:
 	popts->cpo_sample = 0x70;
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 	phys_size_t dram_size;
 
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 6238852af5..69fc15b681 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -149,7 +150,7 @@ int dram_init(void)
 	 * before accessing DDR SPD.
 	 */
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-	initdram();
+	fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
index d1290e27f8..a16f7bc83a 100644
--- a/board/freescale/ls1046ardb/ddr.c
+++ b/board/freescale/ls1046ardb/ddr.c
@@ -96,7 +96,7 @@ found:
 	popts->cpo_sample = 0x70;
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 	phys_size_t dram_size;
 
diff --git a/board/freescale/ls2080a/ddr.c b/board/freescale/ls2080a/ddr.c
index d340c4162d..9d176d3851 100644
--- a/board/freescale/ls2080a/ddr.c
+++ b/board/freescale/ls2080a/ddr.c
@@ -158,7 +158,8 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
 	return 0;
 }
 #endif
-int initdram(void)
+
+int fsl_initdram(void)
 {
 	puts("Initializing DDR....");
 
diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c
index 1e9145d6ab..22a2676a95 100644
--- a/board/freescale/ls2080aqds/ddr.c
+++ b/board/freescale/ls2080aqds/ddr.c
@@ -155,7 +155,7 @@ found:
 	}
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
 	gd->ram_size = fsl_ddr_sdram_size();
diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c
index 029ea61b95..7002dfb236 100644
--- a/board/freescale/ls2080ardb/ddr.c
+++ b/board/freescale/ls2080ardb/ddr.c
@@ -158,7 +158,7 @@ found:
 	}
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
 	gd->ram_size = fsl_ddr_sdram_size();
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index b8de46bb42..6a1f04b81a 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -477,4 +477,12 @@ typedef struct fixed_ddr_parm{
 	int max_freq;
 	fsl_ddr_cfg_regs_t *ddr_settings;
 } fixed_ddr_parm_t;
+
+/**
+ * fsl_initdram() - Set up the SDRAM
+ *
+ * @return 0 if OK, -ve on error
+ */
+int fsl_initdram(void);
+
 #endif