From: Ian Campbell <ijc@hellion.org.uk>
Date: Thu, 12 Jan 2012 06:10:22 +0000 (+0000)
Subject: kirkwood_spi: correct access to irq_mask register
X-Git-Tag: v2012.04-rc1~211
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=3f8435516b1c27c7fdf75ace1de1391d119c65c4;p=u-boot

kirkwood_spi: correct access to irq_mask register

Problem appears to have been present since day one but masked because alignment
aborts were not enabled. ca4b55800ed7 "arm, arm926ejs: always do cpu critical
inits" turned on alignment aborts and uncovered this latent problem.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Jason Cooper <u-boot@lakedaemon.net>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
---

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index dfe542db64..db8ba8bdac 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -66,7 +66,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	debug("data = 0x%08x \n", data);
 
 	writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
-	writel(KWSPI_IRQMASK, spireg->irq_mask);
+	writel(KWSPI_IRQMASK, &spireg->irq_mask);
 
 	/* program mpp registers to select  SPI_CSn */
 	if (cs) {