From: Dai Okamura Date: Mon, 28 Aug 2017 12:57:15 +0000 (+0900) Subject: ARM: uniphier: fix DSPLL init code for LD20 SoC X-Git-Tag: v2017.09-rc4~41^2~8 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4013bbb1f34cc7f468600eba115fb8cfa0ff5dee;p=u-boot ARM: uniphier: fix DSPLL init code for LD20 SoC Signed-off-by: Dai Okamura Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index 697eb7aabf..3aa42f8bfd 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -88,7 +88,7 @@ int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi) if (!base) return -ENOMEM; - tmp = readl(base + 8); /* SSCPLLCTRL */ + tmp = readl(base + 8); /* SSCPLLCTRL3 */ tmp &= ~SC_PLLCTRL3_REGI_MASK; tmp |= regi << SC_PLLCTRL3_REGI_SHIFT; writel(tmp, base + 8); @@ -133,9 +133,9 @@ int uniphier_ld20_dspll_init(unsigned long reg_base) if (!base) return -ENOMEM; - tmp = readl(base + 8); /* DSPLLCTRL2 */ + tmp = readl(base + 4); /* DSPLLCTRL2 */ tmp |= SC_DSPLLCTRL2_K_LD; - writel(tmp, base + 8); + writel(tmp, base + 4); iounmap(base);