From: Marcel Ziswiler <marcel@ziswiler.com>
Date: Sat, 28 Feb 2015 23:53:19 +0000 (+0100)
Subject: pxa: colibri_pxa270: integrate latest validated register settings
X-Git-Tag: v2015.04-rc3~9^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=44ba7a373a46e2816aff0a7aa28166d1dbbe46f0;p=u-boot

pxa: colibri_pxa270: integrate latest validated register settings

Integrate latest validated register settings from Toradex WinCE BSP
4.2 working accross all module versions from early V1.x, V1.2D, V2.2B
to V2.4A.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
---

diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index ed0589a30a..7fc364e838 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -163,7 +163,7 @@
  */
 #define	CONFIG_SYS_GPSR0_VAL	0x00000000
 #define	CONFIG_SYS_GPSR1_VAL	0x00020000
-#define	CONFIG_SYS_GPSR2_VAL	0x0002C000
+#define	CONFIG_SYS_GPSR2_VAL	0x0002c000
 #define	CONFIG_SYS_GPSR3_VAL	0x00000000
 
 #define	CONFIG_SYS_GPCR0_VAL	0x00000000
@@ -171,19 +171,19 @@
 #define	CONFIG_SYS_GPCR2_VAL	0x00000000
 #define	CONFIG_SYS_GPCR3_VAL	0x00000000
 
-#define	CONFIG_SYS_GPDR0_VAL	0x08000000
-#define	CONFIG_SYS_GPDR1_VAL	0x0002A981
-#define	CONFIG_SYS_GPDR2_VAL	0x0202FC00
-#define	CONFIG_SYS_GPDR3_VAL	0x00000000
+#define	CONFIG_SYS_GPDR0_VAL	0xc8008000
+#define	CONFIG_SYS_GPDR1_VAL	0xfc02a981
+#define	CONFIG_SYS_GPDR2_VAL	0x92c3ffff
+#define	CONFIG_SYS_GPDR3_VAL	0x0061e804
 
-#define	CONFIG_SYS_GAFR0_L_VAL	0x00100000
-#define	CONFIG_SYS_GAFR0_U_VAL	0x00C00010
-#define	CONFIG_SYS_GAFR1_L_VAL	0x999A901A
-#define	CONFIG_SYS_GAFR1_U_VAL	0xAAA00008
-#define	CONFIG_SYS_GAFR2_L_VAL	0xAAAAAAAA
-#define	CONFIG_SYS_GAFR2_U_VAL	0x0109A000
-#define	CONFIG_SYS_GAFR3_L_VAL	0x54000300
-#define	CONFIG_SYS_GAFR3_U_VAL	0x00024001
+#define	CONFIG_SYS_GAFR0_L_VAL	0x80100000
+#define	CONFIG_SYS_GAFR0_U_VAL	0xa5c00010
+#define	CONFIG_SYS_GAFR1_L_VAL	0x6992901a
+#define	CONFIG_SYS_GAFR1_U_VAL	0xaaa50008
+#define	CONFIG_SYS_GAFR2_L_VAL	0xaaaaaaaa
+#define	CONFIG_SYS_GAFR2_U_VAL	0x4109a002
+#define	CONFIG_SYS_GAFR3_L_VAL	0x54000310
+#define	CONFIG_SYS_GAFR3_U_VAL	0x00005401
 
 #define	CONFIG_SYS_PSSR_VAL	0x30
 
@@ -196,24 +196,24 @@
 /*
  * Memory settings
  */
-#define	CONFIG_SYS_MSC0_VAL	0x000095f2
-#define	CONFIG_SYS_MSC1_VAL	0x00007ff4
-#define	CONFIG_SYS_MSC2_VAL	0x00000000
-#define	CONFIG_SYS_MDCNFG_VAL	0x08000ac9
-#define	CONFIG_SYS_MDREFR_VAL	0x2013e01e
-#define	CONFIG_SYS_MDMRS_VAL	0x00320032
-#define	CONFIG_SYS_FLYCNFG_VAL	0x00000000
+#define	CONFIG_SYS_MSC0_VAL	0x9ee1c5f2
+#define	CONFIG_SYS_MSC1_VAL	0x9ee1f994
+#define	CONFIG_SYS_MSC2_VAL	0x9ee19ee1
+#define	CONFIG_SYS_MDCNFG_VAL	0x090009c9
+#define	CONFIG_SYS_MDREFR_VAL	0x2003a031
+#define	CONFIG_SYS_MDMRS_VAL	0x00220022
+#define	CONFIG_SYS_FLYCNFG_VAL	0x00010001
 #define	CONFIG_SYS_SXCNFG_VAL	0x40044004
 
 /*
  * PCMCIA and CF Interfaces
  */
-#define	CONFIG_SYS_MECR_VAL	0x00000001
-#define	CONFIG_SYS_MCMEM0_VAL	0x00014307
+#define	CONFIG_SYS_MECR_VAL	0x00000000
+#define	CONFIG_SYS_MCMEM0_VAL	0x00028307
 #define	CONFIG_SYS_MCMEM1_VAL	0x00014307
-#define	CONFIG_SYS_MCATT0_VAL	0x0001c787
+#define	CONFIG_SYS_MCATT0_VAL	0x00038787
 #define	CONFIG_SYS_MCATT1_VAL	0x0001c787
-#define	CONFIG_SYS_MCIO0_VAL	0x0001430f
+#define	CONFIG_SYS_MCIO0_VAL	0x0002830f
 #define	CONFIG_SYS_MCIO1_VAL	0x0001430f
 
 #include "pxa-common.h"