From: Dipen Dudhat <dipen.dudhat@freescale.com>
Date: Wed, 2 Sep 2009 05:55:08 +0000 (+0530)
Subject: ppc/85xx: Fix up eSDHC controller clock frequency in the device tree
X-Git-Tag: v2010.09-rc1~28^2~7^2~42^2~153
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4507c0a0a0e87aec662bedd54bdffdd81d26c643;p=u-boot

ppc/85xx: Fix up eSDHC controller clock frequency in the device tree

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index a692529689..8366379ab6 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -27,6 +27,9 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
+#ifdef CONFIG_FSL_ESDHC
+#include <fsl_esdhc.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -326,4 +329,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #endif
 
 	ft_fixup_cache(blob);
+
+#if defined(CONFIG_FSL_ESDHC)
+	fdt_fixup_esdhc(blob, bd);
+#endif
 }