From: TsiChung Liew Date: Fri, 15 Aug 2008 18:24:25 +0000 (+0000) Subject: ColdFire: Change the SDRAM BRD2WT timing from 3 to 7 X-Git-Tag: v2008.10-rc1~73 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=454e725b3a9537b7f273bbd0cbca180f23a7a6e8;p=u-boot ColdFire: Change the SDRAM BRD2WT timing from 3 to 7 The user manuals recommend 7. Signed-off-by: Kurt Mahan Acked-by: TsiChung Liew --- diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 4037efb733..af6723c637 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -226,7 +226,7 @@ */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_SDRAM_CFG1 0x73711630 -#define CFG_SDRAM_CFG2 0x46370000 +#define CFG_SDRAM_CFG2 0x46770000 #define CFG_SDRAM_CTRL 0xE10B0000 #define CFG_SDRAM_EMOD 0x40010000 #define CFG_SDRAM_MODE 0x018D0000 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index a14c55bc33..248db53d9a 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -212,7 +212,7 @@ */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_SDRAM_CFG1 0x73711630 -#define CFG_SDRAM_CFG2 0x46370000 +#define CFG_SDRAM_CFG2 0x46770000 #define CFG_SDRAM_CTRL 0xE10B0000 #define CFG_SDRAM_EMOD 0x40010000 #define CFG_SDRAM_MODE 0x018D0000