From: Masahiro Yamada Date: Fri, 12 May 2017 13:49:02 +0000 (+0900) Subject: ARM: uniphier: add weird workaround code for LD20 X-Git-Tag: v2017.07-rc1~253^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=45f41c134baf5ff1bbf59d33027f6c79884fa4d9;p=u-boot ARM: uniphier: add weird workaround code for LD20 When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS. The boot flow is as follows: BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot) This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20 SoC (Cortex-A72) hangs in U-Boot. The solution I found is to read sctlr_el1 and write back the value as-is. This should be no effect, but surprisingly fixes the problem for LD20 to boot. I do not know why. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile index eb34c207ce..06072f23bd 100644 --- a/arch/arm/mach-uniphier/arm64/Makefile +++ b/arch/arm/mach-uniphier/arm64/Makefile @@ -9,5 +9,7 @@ obj-y += mem_map.o ifdef CONFIG_ARMV8_MULTIENTRY obj-y += smp.o smp_kick_cpus.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += arm-cci500.o +else +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += lowlevel_init.o endif endif diff --git a/arch/arm/mach-uniphier/arm64/lowlevel_init.S b/arch/arm/mach-uniphier/arm64/lowlevel_init.S new file mode 100644 index 0000000000..e52db1d7fc --- /dev/null +++ b/arch/arm/mach-uniphier/arm64/lowlevel_init.S @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +ENTRY(lowlevel_init) + /* LD20 needs the following code to boot. I do not know why. */ + mrs x0, sctlr_el1 + msr sctlr_el1, x0 + ret +ENDPROC(lowlevel_init)