From: Jagan Teki Date: Tue, 29 Dec 2015 06:42:30 +0000 (+0530) Subject: spi: Minor cleanup X-Git-Tag: v2016.03-rc1~360 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=465c00d78e57209fb11ba5e6bc6abfc501ed07de;p=u-boot spi: Minor cleanup - Add comments on mode_rx - Tab space's Cc: Simon Glass Cc: Michal Simek Cc: Siva Durga Prasad Paladugu Tested-by: Mugunthan V N Tested-by: Bin Meng Tested-by: Jagan Teki Reviewed-by: Bin Meng Signed-off-by: Jagan Teki --- diff --git a/include/spi.h b/include/spi.h index dbd0df89a7..80f8523076 100644 --- a/include/spi.h +++ b/include/spi.h @@ -11,26 +11,26 @@ #define _SPI_H_ /* SPI mode flags */ -#define SPI_CPHA BIT(0) /* clock phase */ -#define SPI_CPOL BIT(1) /* clock polarity */ -#define SPI_MODE_0 (0|0) /* (original MicroWire) */ -#define SPI_MODE_1 (0|SPI_CPHA) -#define SPI_MODE_2 (SPI_CPOL|0) -#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH BIT(2) /* CS active high */ -#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ -#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ -#define SPI_LOOP BIT(5) /* loopback mode */ -#define SPI_SLAVE BIT(6) /* slave mode */ -#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ +#define SPI_MODE_0 (0|0) /* (original MicroWire) */ +#define SPI_MODE_1 (0|SPI_CPHA) +#define SPI_MODE_2 (SPI_CPOL|0) +#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */ /* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) -#define SPI_RX_FAST BIT(1) -#define SPI_RX_DUAL BIT(2) -#define SPI_RX_QUAD BIT(4) +#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */ /* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)