From: Simon Glass Date: Sat, 15 Nov 2014 01:18:39 +0000 (-0700) Subject: x86: dts: Add SATA settings for link X-Git-Tag: v2015.01-rc3~42^2~34 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4896f4acc8b67155026cd1095b5dcdb22e70445a;p=u-boot x86: dts: Add SATA settings for link Add the requires settings to enable SATA on link. Signed-off-by: Simon Glass --- diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 28cef07646..d3c94e0e58 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -164,6 +164,13 @@ }; pci { + sata { + compatible = "intel,pantherpoint-ahci"; + intel,sata-mode = "ahci"; + intel,sata-port-map = <1>; + intel,sata-port0-gen3-tx = <0x00880a7f>; + }; + lpc { compatible = "intel,lpc"; #address-cells = <1>; diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 055b3ac81b..e9efd7c335 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -52,7 +52,6 @@ #undef CONFIG_CMD_SF #undef CONFIG_USB_EHCI #undef CONFIG_CMD_USB -#undef CONFIG_CMD_SCSI #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS