From: Ley Foon Tan <ley.foon.tan@intel.com>
Date: Thu, 14 Jun 2018 10:45:23 +0000 (+0800)
Subject: net: designware: Add reset ctrl to driver
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=495c70f9dfad1a5428ec84b52e8667ea4760ecd6;p=u-boot

net: designware: Add reset ctrl to driver

Add code to reset all reset signals as in Ethernet DT node. A reset
property is an optional feature, so only print out a warning and do not
fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 10a87096b7..19db0a8114 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -15,6 +15,7 @@
 #include <miiphy.h>
 #include <malloc.h>
 #include <pci.h>
+#include <reset.h>
 #include <linux/compiler.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
@@ -673,6 +674,7 @@ int designware_eth_probe(struct udevice *dev)
 	u32 iobase = pdata->iobase;
 	ulong ioaddr;
 	int ret;
+	struct reset_ctl_bulk reset_bulk;
 #ifdef CONFIG_CLK
 	int i, err, clock_nb;
 
@@ -719,6 +721,12 @@ int designware_eth_probe(struct udevice *dev)
 	}
 #endif
 
+	ret = reset_get_bulk(dev, &reset_bulk);
+	if (ret)
+		dev_warn(dev, "Can't get reset: %d\n", ret);
+	else
+		reset_deassert_bulk(&reset_bulk);
+
 #ifdef CONFIG_DM_PCI
 	/*
 	 * If we are on PCI bus, either directly attached to a PCI root port,