From: Marek Vasut <marex@denx.de>
Date: Tue, 21 Jul 2015 03:57:11 +0000 (+0200)
Subject: ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
X-Git-Tag: v2015.10-rc2~225
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4a82854b07f787ce61e4b2776738906b0118afa5;p=u-boot

ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3

Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
---

diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index dd1ce8535f..ce53800553 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1168,7 +1168,17 @@ static void rw_mgr_mem_calibrate_write_test_issue(uint32_t group,
 	writel(mcc_instruction, addr + (group << 2));
 }
 
-/* Test writes, can check for a single bit pass or multiple bit pass */
+/**
+ * rw_mgr_mem_calibrate_write_test() - Test writes, check for single/multiple pass
+ * @rank_bgn:		Rank number
+ * @write_group:	Write Group
+ * @use_dm:		Use DM
+ * @all_correct:	All bits must be correct in the mask
+ * @bit_chk:		Resulting bit mask after the test
+ * @all_ranks:		Test all ranks
+ *
+ * Test writes, can check for a single bit pass or multiple bit pass.
+ */
 static int
 rw_mgr_mem_calibrate_write_test(const u32 rank_bgn, const u32 write_group,
 				const u32 use_dm, const u32 all_correct,