From: Bill Kendrick Date: Tue, 15 Jan 2019 09:24:12 +0000 (-0800) Subject: Relocate register values outside structs, + more X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4b61c54092b4c12b4c02bdb0a04b42fe5e609e79;p=cc65 Relocate register values outside structs, + more Relocated register #define'd values outside of the structs, improved comment format, expanded & corrected some things. h/t Trevin Beattie (https://user.xmission.com/~trevin/) for the PIA register descriptions. --- diff --git a/include/_antic.h b/include/_antic.h index 8fd99694e..8520c5f19 100644 --- a/include/_antic.h +++ b/include/_antic.h @@ -18,7 +18,7 @@ /* */ /* (C) 2000 Freddy Offenga */ /* 24-Jan-2011: Christian Krueger: Added defines for Antic instruction set */ -/* 2019-01-12: Bill Kendrick : More defines for registers */ +/* 2019-01-14: Bill Kendrick : More defines for registers */ /* */ /* */ /* This software is provided 'as-is', without any expressed or implied */ @@ -47,21 +47,57 @@ /* Define a structure with the ANTIC coprocessor's register offsets */ struct __antic { unsigned char dmactl; /* (W) direct memory access control */ + unsigned char chactl; /* (W) character mode control */ + unsigned char dlistl; /* display list pointer low-byte */ + unsigned char dlisth; /* display list pointer high-byte */ + unsigned char hscrol; /* (W) horizontal scroll enable */ + unsigned char vscrol; /* (W) vertical scroll enable */ + unsigned char unuse0; /* unused */ + unsigned char pmbase; /* (W) msb of p/m base address (for when DMACTL has player and/or missile DMA enabled) */ + unsigned char unuse1; /* unused */ + unsigned char chbase; /* (W) msb of character set base address */ + unsigned char wsync; /* (W) wait for horizontal synchronization */ + unsigned char vcount; /* (R) vertical line counter */ + unsigned char penh; /* (R) light pen horizontal position */ + unsigned char penv; /* (R) light pen vertical position */ + unsigned char nmien; /* (W) non-maskable interrupt enable */ + unsigned char nmires; + /* (W) ("NMIRES") nmi reset -- clears the interrupt request register; resets all of the NMI status together + ** (R) ("NMIST") nmi status -- holds cause for the NMI interrupt + */ +}; + + +/* DMACTL register options */ +/* Initialized to 0x22: DMA fetch, normal playfield, no PMG DMA, double-line PMGs */ /* Playfield modes: */ #define DMACTL_PLAYFIELD_NONE 0x00 #define DMACTL_PLAYFIELD_NARROW 0x01 /* e.g., 32 bytes per scanline with thick borders */ #define DMACTL_PLAYFIELD_NORMAL 0x02 /* e.g., 40 bytes per scanline with normal borders */ #define DMACTL_PLAYFIELD_WIDE 0x03 /* e.g., 48 bytes per scanline with no borders (overscan) */ + /* Other options: */ -#define DMACTL_DMA_MISSILES 0x04 /* if not set, GTIA's GRAFP0 thru GRAFP3 used for player shapes; if set, ANTIC's PMBASE will be used to fetch shapes via DMA */ -#define DMACTL_DMA_PLAYERS 0x08 /* (ditto, using GTIA's GRAFM for missile shapes...) */ -#define DMACTL_PMG_SINGLELINE 0x10 /* if not set, default is double-scanline resolution PMGs */ -#define DMACTL_DMA_FETCH 0x20 /* if not set, disables ANTIC operation since it cannot fetch Display List instructions */ -/* Initialized to 0x22 (DMA fetch, normal playfield, no PMG DMA, double-line PMGs) */ +/* If not set, GTIA's GRAFP0 thru GRAFP3, and/or GRAFM registers are used for +** player & missile shapes, respectively. (Modify the registers during the horizontal blank +** (Display List Interrupt), a la "racing the beam" on an Atari VCS/2600, ) +** if set, ANTIC's PMBASE will be used to fetch shapes from memory via DMA. +*/ +#define DMACTL_DMA_MISSILES 0x04 +#define DMACTL_DMA_PLAYERS 0x08 - unsigned char chactl; /* (W) character mode control */ +/* Unless set, PMGs (as fetched via DMA) will be double-scanline resolution */ +#define DMACTL_PMG_SINGLELINE 0x10 + +/* Unless set, ANTIC operation is disabled, since it cannot fetch +** Display List instructions +*/ +#define DMACTL_DMA_FETCH 0x20 + + +/* CHACTL register options */ +/* Initialized to 2 (CHACTL_CHAR_NORMAL | CHACTL_INV_PRESENT) */ /* Inverted (upside-down) characters */ #define CHACTL_CHAR_NORMAL 0x00 @@ -72,31 +108,25 @@ struct __antic { #define CHACTL_INV_OPAQUE 0x01 /* chars with high-bit appear as space */ #define CHACTL_INV_PRESENT 0x02 /* chars with high-bit are reverse-video */ -/* N.B. Default is "CHACTL_CHAR_NORMAL | CHACTL_INV_PRESENT", aka decimal 2 */ +/* Register bits for NMIEN (enabling interrupts) +** and NMIST (determining the cause for the NMI interrupt) +*/ - unsigned char dlistl; /* display list pointer low-byte */ - unsigned char dlisth; /* display list pointer high-byte */ - unsigned char hscrol; /* (W) horizontal scroll enable */ - unsigned char vscrol; /* (W) vertical scroll enable */ - unsigned char unuse0; /* unused */ - unsigned char pmbase; /* (W) msb of p/m base address (for when DMACTL has player and/or missile DMA enabled) */ - unsigned char unuse1; /* unused */ - unsigned char chbase; /* (W) character set base address */ - unsigned char wsync; /* (W) wait for horizontal synchronization */ - unsigned char vcount; /* (R) vertical line counter */ - unsigned char penh; /* (R) light pen horizontal position */ - unsigned char penv; /* (R) light pen vertical position */ +#define NMIEN_DLI 0x80 +/* Display List Interrupts +** Called on a modeline when "DL_DLI" bit is set the ANTIC instruction, +** and jumps through VDSLST vector. +*/ - unsigned char nmien; /* (W) non-maskable interrupt enable */ +#define NMIEN_VBI 0x40 +/* Vertical Blank Interrupt +** Called during every vertical blank; see SYSVBV, VVBLKI, CRITIC, and VVBLKD, +** as well as the SETVBV routine. +*/ -/* NMIEN settings: */ -#define NMIEN_DLI 0x80 /* see also: DL_DLI */ -#define NMIEN_VBI 0x40 #define NMIEN_RESET 0x20 - - unsigned char nmires; /* (W) ("NMIRES") nmi reset; (R) ("NMIST") nmi status */ -}; +/* [Reset] key pressed */ /* ANTIC instruction set */ diff --git a/include/_gtia.h b/include/_gtia.h index a6c6b6032..25d26093c 100644 --- a/include/_gtia.h +++ b/include/_gtia.h @@ -13,7 +13,7 @@ /* */ /* */ /* (C) 2000 Freddy Offenga */ -/* 2019-01-12: Bill Kendrick : More defines for registers */ +/* 2019-01-14: Bill Kendrick : More defines for registers */ /* */ /* */ /* This software is provided 'as-is', without any expressed or implied */ @@ -56,10 +56,6 @@ struct __gtia_write { unsigned char sizep3; /* 0x0B: size of player 3 */ unsigned char sizem; /* 0x0C: size of missiles */ -#define PMG_SIZE_NORMAL 0x0 -#define PMG_SIZE_DOUBLE 0x1 -#define PMG_SIZE_QUAD 0x2 - unsigned char grafp0; /* 0x0D: graphics shape player 0 (used when ANTIC is not instructed to use DMA; see DMACTL) */ unsigned char grafp1; /* 0x0E: graphics shape player 1 */ unsigned char grafp2; /* 0x0F: graphics shape player 2 */ @@ -76,25 +72,69 @@ struct __gtia_write { unsigned char colpf3; /* 0x19: color playfield 3 */ unsigned char colbk; /* 0x1A: color background */ -/* See the "HUE_..." #defines in "atari.h" for the hue values to use with color registers, above */ -/* Bitwise OR (|) with 0x00 (darkest) through 0x0F (lightest) (only even values are unique) */ - unsigned char prior; /* 0x1B: priority selection */ + unsigned char vdelay; + /* 0x1C: vertical delay -- one-line resolution movement of + ** vertical position of an object when two line resolution display is enabled + */ + + unsigned char gractl; /* 0x1D: stick/paddle latch, p/m control */ + + unsigned char hitclr; /* 0x1E: clear p/m collision */ + unsigned char consol; /* 0x1F: builtin speaker */ +}; + + +/* Values for SIZEP0-SIZEP3 and SIZEM registers: */ +#define PMG_SIZE_NORMAL 0x0 /* one color clock per pixel */ +#define PMG_SIZE_DOUBLE 0x1 /* two color clocks per pixel */ +#define PMG_SIZE_QUAD 0x2 /* four color clocks per pixel */ + + +/* COLPM0-COLPM3, COLPF0-COLPF3, COLBK color registers: +** See the "HUE_..." #defines in "atari.h" for the hue values; +** Bitwise OR (|) with 0x00 (darkest) through 0x0F (lightest) (only even values are unique) +*/ + +/* PRIOR register values */ + #define PRIOR_P03_PF03 0x01 /* Players 0-3, then Playfields 0-3, then background */ #define PRIOR_P01_PF03_P23 0x02 /* Players 0-1, then Playfields 0-3, then Players 2-3, then background */ #define PRIOR_PF03_P03 0x04 /* Playfields 0-3, then Players 0-3, then background */ #define PRIOR_PF01_P03_PF23 0x08 /* Playfields 0-1, then Players 0-3, then Playfields 2-3, then background */ #define PRIOR_5TH_PLAYER 0x10 /* Four missiles combine to be a 5th player (uses COLPF3) */ -#define PRIOR_OVERLAP_3RD_COLOR 0x20 /* Overlap of players 0 and 1, and of players 2 and 3, results in a third color - (else overlap is black). The resulting color is a logical OR of the two player colors. */ -#define PRIOR_GFX_MODE_9 0x40 /* 80x192 16 shade mode (shades of the background (COLBK) hue; brightness in COLBK cause additional effects) */ -#define PRIOR_GFX_MODE_10 0x80 /* 80x192 9 color mode (COLPM0 (acts as background) thru COLPM3, followed by COLPF0 thru COLPF4) */ -#define PRIOR_GFX_MODE_11 0xC0 /* 80x192 16 hue mode (hues of the background (COLBK) brightness) */ +#define PRIOR_OVERLAP_3RD_COLOR 0x20 /* Overlap of players result in a 3rd color */ +/* Overlap of players 0 & 1 and of players 2 & 3 results in a third color, +** the logical OR of the two players' colors; +** Other overlaps (e.g., players 0 and 2) result in black (0x00). +*/ + +/* GTIA special graphics mode options */ +/* Pixels are 2 color clocks wide, and one scanline tall +** (so 80x192 in normal playfield width). +** May be used with both bitmap and character modelines. +*/ + +#define PRIOR_GFX_MODE_9 0x40 +/* 16 shade shades of the background (COLBK) hue; +** Note: brightnesses other than 0 (darkest) in COLBK cause additional effects +*/ + +#define PRIOR_GFX_MODE_10 0x80 +/* 9 color palette mode; +** COLPM0 (acts as background) thru COLPM3, followed by COLPF0 thru COLPF3, and COLBK +*/ + +#define PRIOR_GFX_MODE_11 0xC0 +/* 16 hues of the background (COLBK) brightness; +** Note: hues other than 0 (greys) in COLBK caus additional effects +*/ - unsigned char vdelay; /* 0x1C: vertical delay (for one-line resolution movement of vertical position of an object when two line resolution display is enabled */ + +/* VDELAY register values */ #define VDELAY_MISSILE0 0x01 #define VDELAY_MISSILE1 0x02 @@ -105,15 +145,17 @@ struct __gtia_write { #define VDELAY_PLAYER2 0x40 #define VDELAY_PLAYER3 0x80 - unsigned char gractl; /* 0x1D: stick/paddle latch, p/m control */ + +/* GRACTL register values */ #define GRACTL_MISSLES 0x01 /* enable missiles */ #define GRACTL_PLAYERS 0x02 /* enable players */ -#define GRACTL_LATCH_TRIGGER_INPUTS 0x04 /* "latch" triggers; once pressed, will give a continuous pressed input until this bit is cleared */ - unsigned char hitclr; /* 0x1E: clear p/m collision */ - unsigned char consol; /* 0x1F: builtin speaker */ -}; +#define GRACTL_LATCH_TRIGGER_INPUTS 0x04 +/* "Latch" triggers; once pressed, will give a continuous +** pressed input until this bit is cleared +*/ + /* Define a structure with the GTIA register offsets for read (R) */ struct __gtia_read { @@ -141,20 +183,26 @@ struct __gtia_read { unsigned char pal; /* 0x14: pal/ntsc flag */ + unsigned char unused[10]; + + unsigned char consol; /* 0x1F: console buttons */ +}; + + +/* PAL register possible values */ + #define TV_STD_PAL 0x1 #define TV_STD_NTSC 0xE /* Note: This only tells you whether the GTIA is PAL or NTSC; some NTSC systems are modded with PAL ANTIC chips; testing VCOUNT limits can be done to check for that */ /* Note: Seems like it's not possible to test for SECAM */ - unsigned char unused[10]; - unsigned char consol; /* 0x1F: console buttons */ +/* Reading console keys (Start, Select, Option) via CONSOL register: */ #define CONSOL_START(x) !((unsigned char)((x) & 1)) /* true if Start pressed */ #define CONSOL_SELECT(x) !((unsigned char)((x) & 2)) /* true if Select pressed */ #define CONSOL_OPTION(x) !((unsigned char)((x) & 4)) /* true if Option pressed */ -}; /* End of _gtia.h */ #endif /* #ifndef __GTIA_H */ diff --git a/include/_pia.h b/include/_pia.h index 22016f3a5..dc3830acb 100644 --- a/include/_pia.h +++ b/include/_pia.h @@ -11,7 +11,7 @@ /* */ /* */ /* (C) 2000 Freddy Offenga */ -/* 2019-01-13: Bill Kendrick : Defines for registers */ +/* 2019-01-14: Bill Kendrick : Defines for registers */ /* */ /* */ /* This software is provided 'as-is', without any expressed or implied */ @@ -42,6 +42,15 @@ /* Define a structure with the PIA register offsets */ struct __pia { unsigned char porta; /* port A data r/w */ + unsigned char portb; /* port B data r/w */ + unsigned char pactl; /* port A control */ + unsigned char pbctl; /* port B control */ +}; + + +/* PORTA and PORTB register bits */ + +/* See also: "JOY_xxx_MASK" in "atari.h" */ /* Paddle 0-3 triggers (per PORTA bits) */ #define PORTA_PTRIG3 0x80 @@ -50,7 +59,7 @@ struct __pia { #define PORTA_PTRIG0 0x04 - unsigned char portb; /* port B data r/w */ +/* On the Atari 400/800, PORTB is the same as PORTA, but for controller ports 3 & 4. */ /* Paddle 4-7 triggers (per PORTB bits); only 400/800 had four controller ports */ #define PORTB_PTRIG7 0x80 @@ -58,11 +67,57 @@ struct __pia { #define PORTB_PTRIG5 0x08 #define PORTB_PTRIG4 0x04 -/* See also: "JOY_xxx_MASK" in "atari.h" */ +/* On the XL series of computers, PORTB has been changed to a memory and +** LED control (1200XL model only) register (read/write): +*/ + +#define PORTB_OSROM 0x01 +/* If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF +** (except that the area $D000-$D7FF will only access the hardware registers.) +** If clear, RAM is enabled in this area (again, save for the hole.) +*/ + +#define PORTB_BASICROM 0x02 +/* If set, RAM is enabled for the address range $A000-$BFFF. +** If clear, the built-in BASIC ROM is enabled at this address. +** And if there is a cartridge installed in the computer, it makes no difference. +*/ + +#define PORTB_LED1 0x04 +#define PORTB_LED2 0x08 +/* If set, the corresponding LED is turned off. If clear, the LED will be on. +** (1200XL only) +*/ + + +/* On the XE series of computers, PORTB is a bank-selected memory control register (read/write): */ + +/* These bits determine which memory bank is visible to the CPU and/or ANTIC chip +** when their Bank Switch bit is set. There are four possible banks of 16KB each. +*/ +#define PORTB_BANKSELECT1 0x00 +#define PORTB_BANKSELECT2 0x04 +#define PORTB_BANKSELECT3 0x08 +#define PORTB_BANKSELECT4 0x0C + + +#define PORTB_BANKSWITCH_CPU 0x10 +#define PORTB_BANKSWITCH_ANTIC 0x20 +/* If set, the CPU and/or ANTIC chip will access bank-switched memory mapped to the +** address range $4000-$7FFF. +** If clear, the CPU and/or ANTIC will see normal memory in this region. +*/ - unsigned char pactl; /* port A control */ - unsigned char pbctl; /* port B control */ + +#define PORTB_SELFTEST 0x80 +/* If set, RAM is enabled for the address range $5000-$57FF. +** If clear, the self-test ROM (physically located at $D000-$D7FF, under the hardware registers) +** is remapped to this memory area. +*/ + + +/* PACTL and PBCTL register bits */ #define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */ /* One equals enable. Set by the OS but available to the user; reset on powerup. */ @@ -72,17 +127,24 @@ struct __pia { #define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */ /* One equals PORTA register; zero equals direction control register */ -#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */ -/* Turn the cassette on or off; zero equals on) */ - -#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */ - #define PxCTL_BIT4 0x10 /* "Set to one" */ #define PxCTL_BIT5 0x20 /* "Set to one" */ #define PxCTL_BIT6 0x40 /* "Set to zero" */ #define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */ /* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. */ -}; + + +/* PACTL-specific register bit */ + +#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */ +/* Turn the cassette on or off; zero equals on) */ + + +/* PBCTL-specific register bit */ + +#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */ + + /* End of _pia.h */ #endif diff --git a/include/_pokey.h b/include/_pokey.h index 4a7643eb5..01a3225a6 100644 --- a/include/_pokey.h +++ b/include/_pokey.h @@ -14,7 +14,7 @@ /* */ /* */ /* (C) 2000 Freddy Offenga */ -/* 2019-01-13: Bill Kendrick : More defines for registers */ +/* 2019-01-14: Bill Kendrick : More defines for registers */ /* */ /* */ /* This software is provided 'as-is', without any expressed or implied */ @@ -53,11 +53,30 @@ struct __pokey_write { unsigned char audc3; /* audio channel #3 control */ unsigned char audf4; /* audio channel #4 frequency */ unsigned char audc4; /* audio channel #4 control */ + unsigned char audctl; /* audio control */ + unsigned char stimer; /* start pokey timers */ + + unsigned char skrest; + /* reset serial port status reg.; + ** Reset BITs 5 - 7 of the serial port status register (SKCTL) to "1" + */ + + unsigned char potgo; /* start paddle scan sequence (see "ALLPOT") */ + unsigned char unuse1; /* unused */ + unsigned char serout; /* serial port data output */ + unsigned char irqen; /* interrupt request enable */ + unsigned char skctl; /* serial port control */ +}; + + -/* The values for the distortion bits (AUDCx) are as follows; - the first process is to divide the clock value by the frequency, - then mask the output using the polys in the order below; - finally, the result is divided by two */ +/* AUDC1-4 register values */ + +/* Meaningful values for the distortion bits. +** The first process is to divide the clock value by the frequency, +** then mask the output using the polys in the order below; +** finally, the result is divided by two. +*/ #define AUDC_POLYS_5_17 0x00 #define AUDC_POLYS_5 0x20 /* Same as 0x60 */ #define AUDC_POLYS_5_4 0x40 @@ -65,10 +84,14 @@ struct __pokey_write { #define AUDC_POLYS_NONE 0xA0 /* Same as 0xE0 */ #define AUDC_POLYS_4 0xC0 +/* When set, the volume value in AUDC1-4 bits 0-3 is sent directly to the speaker; +** it is not modulated with the frequency specified in the AUDF1-4 registers. +** (See "De Re Atari" Chapter 7: Sound) +*/ #define AUDC_VOLUME_ONLY 0x10 - unsigned char audctl; /* audio control */ +/* AUDCTL register values */ #define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */ #define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */ @@ -79,17 +102,9 @@ struct __pokey_write { #define AUDCTL_CLOCK_CHAN1_179MHZ 0x40 /* Clock channel one with 1.79 MHz */ #define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */ - unsigned char stimer; /* start pokey timers */ - - unsigned char skrest; /* reset serial port status reg.; - Reset BITs 5 - 7 of the serial port status register (SKCTL) to "1" */ - unsigned char potgo; /* start paddle scan sequence (see "ALLPOT") */ - unsigned char unuse1; /* unused */ - unsigned char serout; /* serial port data output */ +/* IRQEN register values */ - unsigned char irqen; /* interrupt request enable */ -#define POKMSK *(unsigned char *) 0x10 /* POKEY interrupts: the IRQ service uses and alters this location */ #define IRQEN_TIMER_1 0x01 /* The POKEY timer one interrupt is enabled */ #define IRQEN_TIMER_2 0x02 /* The POKEY timer two interrupt is enabled */ #define IRQEN_TIMER_4 0x04 /* The POKEY timer four interrupt is enabled */ @@ -100,21 +115,46 @@ struct __pokey_write { #define IRQEN_BREAK_KEY 0x80 /* The BREAK key is enabled */ - unsigned char skctl; /* serial port control */ +/* SKCTL register values */ #define SKCTL_KEYBOARD_DEBOUNCE 0x01 /* Enable keyboard debounce circuits */ #define SKCTL_KEYBOARD_SCANNING 0x02 /* Enable keyboard scanning circuit */ + #define SKCTL_FAST_POT_SCAN 0x04 /* Fast pot scan */ -/* the pot scan counter completes its sequence in two TV line times instead of - one frame time (228 scan lines). Not as accurate as the normal pot scan */ -#define SKCTL_TWO_TONE_MODE 0x08 /* Serial output is transmitted as a two-tone -signal rather than a logic true/false. POKEY two-tone mode. */ -/* Serial port mode control used to set the bi-directional clock lines */ -#define SKCTL_BIT4 0x10 /* FIXME; more meaningful name */ -#define SKCTL_BIT5 0x20 /* FIXME; more meaningful name */ -#define SKCTL_BIT6 0x40 /* FIXME; more meaningful name */ +/* The pot scan counter completes its sequence in two TV line times instead of +** one frame time (228 scan lines). Not as accurate as the normal pot scan +*/ + +#define SKCTL_TWO_TONE_MODE 0x08 /* POKEY two-tone mode */ +/* Serial output is transmitted as a two-tone signal rather than a logic true/false. */ + + +/* Bits 4, 5, and 6 of SKCTL set Serial Mode Control: */ + +#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00 +/* Trans. & Receive rates set by external clock; Also internal clock phase reset to zero. */ + +#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10 +/* Trans. rate set by external clock; Receive asynch. (ch. 4) (CH3 and CH4). */ + +#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20 +/* Trans. & Receive rates set by Chan. 4; Chan. 4 output on Bi-Direct. clock line. */ + +/* N.B.: Bit combination 0,1,1 not useful */ + +#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40 +/* Trans. rate set by Chan. 4; Receive rate set by external clock. */ + +/* N.B.: Bit combination 1,0,1 not useful */ + +#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60 +/* Trans. rate set by Chan. 2; Receive rate set by Chan. 4; Chan. 4 out on Bi-Direct. clock line. */ + +#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70 +/* Trans. rate set by Chan. 2; Receive asynch. (chan 3 & 4); Bi-Direct. clock not used (tri-state condition). */ + + #define SKCTL_FORCE_BREAK 0x80 /* Force break (serial output to zero) */ -}; /* Define a structure with the POKEY register offsets for read (R) */ @@ -134,8 +174,11 @@ struct __pokey_read { unsigned char unuse3; /* unused */ unsigned char serin; /* serial port input */ unsigned char irqst; /* interrupt request status */ - unsigned char skstat; /* serial port status */ +}; + + +/* SKSTAT register values */ #define SKSTAT_SERIN_SHIFTREG_BUSY 0x02 /* Serial input shift register busy */ #define SKSTAT_LASTKEY_PRESSED 0x04 /* the last key is still pressed */ #define SKSTAT_SHIFTKEY_PRESSED 0x08 /* the [Shift] key is pressed */ @@ -143,88 +186,122 @@ struct __pokey_read { #define SKSTAT_KEYBOARD_OVERRUN 0x20 /* Keyboard over-run; Reset BITs 7, 6 and 5 (latches) to 1, using SKREST */ #define SKSTAT_INPUT_OVERRUN 0x40 /* Serial data input over-run. Reset latches as above. */ #define SKSTAT_INPUT_FRAMEERROR 0x80 /* Serial data input frame error caused by missing or extra bits. Reset latches as above. */ -}; -/* Internal keyboard codes from http://www.atariarchives.org/c3ba/page004.php */ -/* (Defined below in the order the keys appear on a 1200XL keyboard, from top left to bottom right) */ -/* (Note: Numerous Shift+Ctrl+key combos are unavailable) */ +/* KBCODE internal keyboard codes for Atari 8-bit computers*/ + +/* Defined below in the order the keys appear on a 1200XL keyboard, +** from top left to bottom right. +** Note: Numerous Shift+Ctrl+key combos are unavailable. +** (Source: "Compute!'s Thrid Book of Atari", "Reading the Keyboard Codes") +*/ -#define KEYCODE_NONE 255 /* 255 = no key pressed (but is also same as Ctrl+Shift+A) */ +#define KEYCODE_NONE 255 /* No key pressed (but also Ctrl+Shift+A) */ + + +/* Special keys: */ + +/* N.B. Reset key not handled like other keys */ + +/* N.B. Select, Start, and Option console keys not handled like other keys; +** see CONSOL register in GTIA +*/ /* Fn (function) keys only available on 1200XL */ -#define KEYCODE_F1 3 -#define KEYCODE_F2 4 -#define KEYCODE_F3 19 -#define KEYCODE_F4 20 +#define KEYCODE_F1 3 +#define KEYCODE_F2 4 +#define KEYCODE_F3 19 +#define KEYCODE_F4 20 /* HELP key only available on XL/XE series */ -#define KEYCODE_HELP 17 - -#define KEYCODE_ESC 28 -#define KEYCODE_1 31 -#define KEYCODE_2 30 -#define KEYCODE_3 26 -#define KEYCODE_4 24 -#define KEYCODE_5 29 -#define KEYCODE_6 27 -#define KEYCODE_7 51 -#define KEYCODE_8 53 -#define KEYCODE_9 48 -#define KEYCODE_0 50 -#define KEYCODE_LT 54 -#define KEYCODE_GT 55 -#define KEYCODE_BKSPC 52 - -#define KEYCODE_TAB 44 -#define KEYCODE_Q 47 -#define KEYCODE_W 46 -#define KEYCODE_E 42 -#define KEYCODE_R 40 -#define KEYCODE_T 45 -#define KEYCODE_Y 43 -#define KEYCODE_U 11 -#define KEYCODE_I 13 -#define KEYCODE_O 8 -#define KEYCODE_P 10 -#define KEYCODE_MINUS 14 -#define KEYCODE_EQUALS 15 -#define KEYCODE_RETURN 12 - -#define KEYCODE_CTRL 128 /* binary OR'd */ - -#define KEYCODE_A 63 -#define KEYCODE_S 62 -#define KEYCODE_D 58 -#define KEYCODE_F 56 -#define KEYCODE_G 61 -#define KEYCODE_H 57 -#define KEYCODE_J 1 -#define KEYCODE_K 5 -#define KEYCODE_L 0 -#define KEYCODE_; 2 -#define KEYCODE_PLUS 6 -#define KEYCODE_ASTERISK 7 -#define KEYCODE_CAPS 60 - -#define KEYCODE_SHIFT 64 /* binary OR'd */ - -#define KEYCODE_Z 23 -#define KEYCODE_X 22 -#define KEYCODE_C 18 -#define KEYCODE_V 16 -#define KEYCODE_B 21 -#define KEYCODE_N 35 -#define KEYCODE_M 37 -#define KEYCODE_COMMA 32 -#define KEYCODE_PERIOD 34 -#define KEYCODE_SLASH 38 -#define KEYCODE_FUJI 39 /* (as seen on 400/800) */ -#define KEYCODE_INVERSE 39 /* (alternative name; as seen on XL/XE) */ - -#define KEYCODE_SPACE 33 +#define KEYCODE_HELP 17 + +/* N.B. Break key not handled like other keys */ + + +/* Keyboard top row */ + +#define KEYCODE_ESC 28 +#define KEYCODE_1 31 +#define KEYCODE_2 30 +#define KEYCODE_3 26 +#define KEYCODE_4 24 +#define KEYCODE_5 29 +#define KEYCODE_6 27 +#define KEYCODE_7 51 +#define KEYCODE_8 53 +#define KEYCODE_9 48 +#define KEYCODE_0 50 +#define KEYCODE_LT 54 +#define KEYCODE_GT 55 +#define KEYCODE_BKSPC 52 + + +/* Keyboard second row */ + +#define KEYCODE_TAB 44 +#define KEYCODE_Q 47 +#define KEYCODE_W 46 +#define KEYCODE_E 42 +#define KEYCODE_R 40 +#define KEYCODE_T 45 +#define KEYCODE_Y 43 +#define KEYCODE_U 11 +#define KEYCODE_I 13 +#define KEYCODE_O 8 +#define KEYCODE_P 10 +#define KEYCODE_MINUS 14 +#define KEYCODE_EQUALS 15 +#define KEYCODE_RETURN 12 + + +/* Keyboard third row */ + +#define KEYCODE_CTRL 128 /* binary OR'd */ +/* N.B. Cannot read Ctrl key alone */ + +#define KEYCODE_A 63 +#define KEYCODE_S 62 +#define KEYCODE_D 58 +#define KEYCODE_F 56 +#define KEYCODE_G 61 +#define KEYCODE_H 57 +#define KEYCODE_J 1 +#define KEYCODE_K 5 +#define KEYCODE_L 0 +#define KEYCODE_SEMICOLON 2 +#define KEYCODE_PLUS 6 +#define KEYCODE_ASTERISK 7 +#define KEYCODE_CAPS 60 + + +/* Keyboard bottom row */ + +#define KEYCODE_SHIFT 64 /* binary OR'd */ +/* N.B. Cannot read Shift key alone via KBCODE; +** instead, check "Shfit key press" bit of SKSTAT register +*/ + +#define KEYCODE_Z 23 +#define KEYCODE_X 22 +#define KEYCODE_C 18 +#define KEYCODE_V 16 +#define KEYCODE_B 21 +#define KEYCODE_N 35 +#define KEYCODE_M 37 +#define KEYCODE_COMMA 32 +#define KEYCODE_PERIOD 34 +#define KEYCODE_SLASH 38 +#define KEYCODE_FUJI 39 /* (as seen on 400/800) */ +#define KEYCODE_INVERSE 39 /* (alternative name; as seen on XL/XE) */ + +/* N.B. No way to tell left from right Shift keys */ + + +/* Keyboard Space key */ + +#define KEYCODE_SPACE 33 /* End of _pokey.h */ #endif /* #ifndef __POKEY_H */ - diff --git a/include/atari.h b/include/atari.h index f9c78be0c..613f0e5bb 100644 --- a/include/atari.h +++ b/include/atari.h @@ -86,14 +86,18 @@ #define CH_HLINE 0x12 #define CH_VLINE 0x7C -/* color defines */ -/* make GTIA color value */ +/* Color definitions */ + +/* Make a GTIA color value */ #define _gtia_mkcolor(hue,lum) (((hue) << 4) | ((lum) << 1)) -/* luminance values go from 0 (black) to 7 (white) */ +/* Luminance values go from 0 (black) to 7 (white) */ -/* hue values (these can vary depending on TV standard (NTSC vs PAL), tint potentiometer settings, TV tint settings, emulator palette, etc.) */ +/* Hue values */ +/* (These can vary depending on TV standard (NTSC vs PAL), +** tint potentiometer settings, TV tint settings, emulator palette, etc.) +*/ #define HUE_GREY 0 #define HUE_GOLD 1 #define HUE_GOLDORANGE 2 @@ -112,7 +116,9 @@ #define HUE_YELLOWRED 15 /* Color defines, similar to c64 colors (untested) */ -/* Note that the conio color implementation is monochrome (bgcolor and textcolor are only placeholders) */ +/* Note that the conio color implementation is monochrome +** (bgcolor and textcolor are only placeholders) +*/ /* Use the defines with the setcolor() or _atari_xxxcolor() functions */ #define COLOR_BLACK _gtia_mkcolor(HUE_GREY,0) #define COLOR_WHITE _gtia_mkcolor(HUE_GREY,7) @@ -256,18 +262,18 @@ #define KEY_LEFT (KEY_PLUS | KEY_CTRL) #define KEY_RIGHT (KEY_ASTERISK | KEY_CTRL) -/* color register functions */ +/* Color register functions */ extern void __fastcall__ _setcolor (unsigned char color_reg, unsigned char hue, unsigned char luminace); extern void __fastcall__ _setcolor_low (unsigned char color_reg, unsigned char color_value); extern unsigned char __fastcall__ _getcolor (unsigned char color_reg); -/* other screen functions */ +/* Other screen functions */ extern int __fastcall__ _graphics (unsigned char mode); /* mode value same as in BASIC */ extern void __fastcall__ _scroll (signed char numlines); /* numlines > 0 scrolls up */ /* numlines < 0 scrolls down */ -/* misc. functions */ +/* Misc. functions */ extern unsigned char get_ostype(void); /* get ROM version */ extern unsigned char get_tv(void); /* get TV system */ extern void _save_vecs(void); /* save system vectors */ @@ -275,7 +281,7 @@ extern void _rest_vecs(void); /* restore system vectors */ extern char *_getdefdev(void); /* get default floppy device */ extern unsigned char _is_cmdline_dos(void); /* does DOS support command lines */ -/* global variables */ +/* Global variables */ extern unsigned char _dos_type; /* the DOS flavour */ #ifndef __ATARIXL__ extern void atr130_emd[]; @@ -443,6 +449,5 @@ struct __iocb { #define IOCB_FORMAT 0xFE /* format */ - /* End of atari.h */ #endif