From: Anthony Felice <tony.felice@timesys.com>
Date: Fri, 9 Oct 2015 20:38:39 +0000 (-0400)
Subject: vf610twr: Fix typo in DRAM init
X-Git-Tag: v2015.10~22
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4b8cdd484c51bb05b47cc83c634ba4a4043aa997;p=u-boot

vf610twr: Fix typo in DRAM init

This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
---

diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c
index 78349317e0..37b241dd26 100644
--- a/board/freescale/vf610twr/vf610twr.c
+++ b/board/freescale/vf610twr/vf610twr.c
@@ -108,7 +108,7 @@ int dram_init(void)
 		.trcd_int          = 6,
 		.tras_lockout      = 0,
 		.tdal              = 12,
-		.bstlen            = 0,
+		.bstlen            = 3,
 		.tdll              = 512,
 		.trp_ab            = 6,
 		.tref              = 3120,