From: Markus Niebel Date: Fri, 3 Feb 2017 15:25:02 +0000 (+0100) Subject: mx6: tqma6: clear enet clk sel for mba6 X-Git-Tag: v2017.05-rc1~49^2~31 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4ba811760a1a49311d838612a717ef418bbd1f66;p=u-boot mx6: tqma6: clear enet clk sel for mba6 we have external ref clock from phy. Signed-off-by: Markus Niebel --- diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index 6d63953014..1c5b95304b 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -114,6 +114,11 @@ static iomux_v3_cfg_t const mba6_enet_pads[] = { static void mba6_setup_iomuxc_enet(void) { + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* clear gpr1[ENET_CLK_SEL] for externel clock */ + clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); + __raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE, (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM); __raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,