From: Simon Glass Date: Mon, 26 Sep 2016 03:33:34 +0000 (-0600) Subject: x86: ivybridge: Fix PCH power setup X-Git-Tag: v2016.11-rc2~11^2~14 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4e0318c32f01e5178f9ddd29313fcb24a1584dd6;p=u-boot x86: ivybridge: Fix PCH power setup At present pch_power_options() has the arguments to writel() around the wrong way. Fix this and update it to compile on 64-bit machines. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c index 4e0be2a88b..91c9c0e35e 100644 --- a/arch/x86/cpu/ivybridge/lpc.c +++ b/arch/x86/cpu/ivybridge/lpc.c @@ -213,10 +213,10 @@ static int pch_power_options(struct udevice *pch) dm_pci_read_config16(pch, 0x40, &pmbase); pmbase &= 0xfffe; - writel(pmbase + GPE0_EN, fdtdec_get_int(blob, node, - "intel,gpe0-enable", 0)); - writew(pmbase + ALT_GP_SMI_EN, fdtdec_get_int(blob, node, - "intel,alt-gp-smi-enable", 0)); + writel(fdtdec_get_int(blob, node, "intel,gpe0-enable", 0), + (ulong)pmbase + GPE0_EN); + writew(fdtdec_get_int(blob, node, "intel,alt-gp-smi-enable", 0), + (ulong)pmbase + ALT_GP_SMI_EN); /* Set up power management block and determine sleep mode */ reg32 = inl(pmbase + 0x04); /* PM1_CNT */