From: Christophe Kerello <christophe.kerello@st.com>
Date: Wed, 13 Sep 2017 16:00:08 +0000 (+0200)
Subject: dm: misc: add stm32 rcc driver
X-Git-Tag: v2017.11-rc1~55
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4e280b91a188bfe29d34eb1146b4b0a7f00ad31d;p=u-boot

dm: misc: add stm32 rcc driver

This patch adds the support of reset and clock control
block (rcc) found on STM32 SoCs.
This driver is similar to a MFD linux driver.

This driver supports currently STM32H7 only.
STM32F4 and STM32F7 will be migrated to this rcc MFD driver
in the future to uniformize all STM32 SoCs already upstreamed.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 4133017e32..f1c15cb9fa 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -158,6 +158,15 @@ config PCA9551_I2C_ADDR
 	help
 	  The I2C address of the PCA9551 LED controller.
 
+config STM32_RCC
+	bool "Enable RCC driver for the STM32 SoC's family"
+	depends on STM32 && MISC
+	help
+	  Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
+	  block) is responsible of the management of the clock and reset
+	  generation.
+	  This driver is similar to an MFD driver in the Linux kernel.
+
 config TEGRA_CAR
 	bool "Enable support for the Tegra CAR driver"
 	depends on TEGRA_NO_BPMP
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 21f7e6c6f5..ada7624417 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
+obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
new file mode 100644
index 0000000000..a6c2a757ec
--- /dev/null
+++ b/drivers/misc/stm32_rcc.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <misc.h>
+#include <dm/lists.h>
+
+static int stm32_rcc_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *child;
+
+	debug("%s(dev=%p)\n", __func__, dev);
+
+	ret = device_bind_driver_to_node(dev, "stm32h7_rcc_clock",
+					 "stm32h7_rcc_clock",
+					 dev_ofnode(dev), &child);
+	if (ret)
+		return ret;
+
+	return device_bind_driver_to_node(dev, "stm32_rcc_reset",
+					  "stm32_rcc_reset",
+					  dev_ofnode(dev), &child);
+}
+
+static const struct misc_ops stm32_rcc_ops = {
+};
+
+static const struct udevice_id stm32_rcc_ids[] = {
+	{.compatible = "st,stm32h743-rcc"},
+	{ }
+};
+
+U_BOOT_DRIVER(stm32_rcc) = {
+	.name		= "stm32-rcc",
+	.id		= UCLASS_MISC,
+	.of_match	= stm32_rcc_ids,
+	.bind		= stm32_rcc_bind,
+	.ops		= &stm32_rcc_ops,
+};